diff options
author | Caveh Jalali <caveh@google.com> | 2017-08-24 02:15:36 -0700 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2017-08-29 22:08:20 -0700 |
commit | c1e5671e561c82c9532cb29b17fc7cf4061ab20a (patch) | |
tree | 22348963ba0441bf7c4f93e1c88d481438c78b3e /board/eve | |
parent | c191bf9f4d5b4c2e45583820307d95592d2221ba (diff) | |
download | chrome-ec-c1e5671e561c82c9532cb29b17fc7cf4061ab20a.tar.gz |
anx3429: force chip reset on PD_RESUME
we need to properly restart the anx3429 after a firmware update.
simply initializing the chip doesn't seem to get it to reload its
firmware - at least not the portion of the chip that implements the
firmware version register. so, we explicitly power down and reset the
chip before reinitializing it to force it to run the new firmware.
the chip also needs a 10ms "off" time so the reset is properly seen by
the chip, so i did a light refactoring of the code paths that reset
the anx3429.
TEST=used 2 different firmware blobs and verified it switches between
them during software sync.
BRANCH=none
BUG=b:35586895
Change-Id: I967898dd906f21bdc5bc4ce9c1dff9f873d198c1
Signed-off-by: Caveh Jalali <caveh@google.com>
Reviewed-on: https://chromium-review.googlesource.com/631976
Diffstat (limited to 'board/eve')
-rw-r--r-- | board/eve/board.c | 25 |
1 files changed, 16 insertions, 9 deletions
diff --git a/board/eve/board.c b/board/eve/board.c index dd0b744573..38926113bd 100644 --- a/board/eve/board.c +++ b/board/eve/board.c @@ -227,30 +227,38 @@ struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_COUNT] = { }, }; -/* called from anx74xx_set_power_mode() */ +/** + * Power on (or off) a single TCPC. + * minimum on/off delays are included. + * + * @param port Port number of TCPC. + * @param mode 0: power off, 1: power on. + */ void board_set_tcpc_power_mode(int port, int mode) { switch (port) { case 0: if (mode) { gpio_set_level(GPIO_USB_C0_TCPC_PWR, 1); - msleep(10); + msleep(ANX74XX_PWR_H_RST_H_DELAY_MS); gpio_set_level(GPIO_USB_C0_PD_RST_L, 1); } else { gpio_set_level(GPIO_USB_C0_PD_RST_L, 0); - msleep(1); + msleep(ANX74XX_RST_L_PWR_L_DELAY_MS); gpio_set_level(GPIO_USB_C0_TCPC_PWR, 0); + msleep(ANX74XX_PWR_L_PWR_H_DELAY_MS); } break; case 1: if (mode) { gpio_set_level(GPIO_USB_C1_TCPC_PWR, 1); - msleep(10); + msleep(ANX74XX_PWR_H_RST_H_DELAY_MS); gpio_set_level(GPIO_USB_C1_PD_RST_L, 1); } else { gpio_set_level(GPIO_USB_C1_PD_RST_L, 0); - msleep(1); + msleep(ANX74XX_RST_L_PWR_L_DELAY_MS); gpio_set_level(GPIO_USB_C1_TCPC_PWR, 0); + msleep(ANX74XX_PWR_L_PWR_H_DELAY_MS); } break; } @@ -261,15 +269,15 @@ void board_reset_pd_mcu(void) /* Assert reset */ gpio_set_level(GPIO_USB_C0_PD_RST_L, 0); gpio_set_level(GPIO_USB_C1_PD_RST_L, 0); - msleep(1); + msleep(ANX74XX_RST_L_PWR_L_DELAY_MS); /* Disable power */ gpio_set_level(GPIO_USB_C0_TCPC_PWR, 0); gpio_set_level(GPIO_USB_C1_TCPC_PWR, 0); - msleep(10); + msleep(ANX74XX_PWR_L_PWR_H_DELAY_MS); /* Enable power */ gpio_set_level(GPIO_USB_C0_TCPC_PWR, 1); gpio_set_level(GPIO_USB_C1_TCPC_PWR, 1); - msleep(10); + msleep(ANX74XX_PWR_H_RST_H_DELAY_MS); /* Deassert reset */ gpio_set_level(GPIO_USB_C0_PD_RST_L, 1); gpio_set_level(GPIO_USB_C1_PD_RST_L, 1); @@ -990,4 +998,3 @@ const struct motion_sensor_t *motion_als_sensors[] = { &motion_sensors[LID_LIGHT], }; BUILD_ASSERT(ARRAY_SIZE(motion_als_sensors) == ALS_COUNT); - |