diff options
| author | Sue <sue.chen@quanta.corp-partner.google.com> | 2020-04-08 17:20:44 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-04-15 21:47:41 +0000 |
| commit | 2f6626d427eb6f3b9c2dc7406b152a85aa55b7b3 (patch) | |
| tree | e2a07a31b4cddb745b28c30df0dffc292adb7523 /board/ezkinil | |
| parent | 3969b0c1fb8a169ca2cceaf77958c7f1668f1a55 (diff) | |
| download | chrome-ec-2f6626d427eb6f3b9c2dc7406b152a85aa55b7b3.tar.gz | |
Ezkinil: remove unused GPIO definition
remove unused GPIO pin defined in gpio.inc
BUG=b:144227077
BRANCH=none
TEST=make buildall -j
Change-Id: I7ac7d63b2c124843d1ccdaada1838669f02d534b
Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2143071
Tested-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Diffstat (limited to 'board/ezkinil')
| -rw-r--r-- | board/ezkinil/gpio.inc | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/board/ezkinil/gpio.inc b/board/ezkinil/gpio.inc index 08b70f03d2..988b0ee6b0 100644 --- a/board/ezkinil/gpio.inc +++ b/board/ezkinil/gpio.inc @@ -46,7 +46,6 @@ GPIO(EC_SYS_RST_L, PIN(C, 7), GPIO_ODR_HIGH) /* Cold Reset to SOC */ GPIO(USB_C0_TCPC_RST_L, PIN(E, 1), GPIO_OUT_HIGH) /* C0 TCPC Reset */ GPIO(USB_C1_TCPC_RST_L, PIN(F, 0), GPIO_OUT_HIGH) /* C1 TCPC Reset */ GPIO(USB_C0_HPD, PIN(F, 5), GPIO_OUT_LOW) /* C0 DP Hotplug Detect */ -GPIO(USB_C0_IN_HPD, PIN(7, 3), GPIO_OUT_LOW) /* C0 IN Hotplug Detect */ GPIO(DP1_HPD, PIN(F, 4), GPIO_OUT_LOW) /* C1 DP Hotplug Detect */ GPIO(DP2_HPD, PIN(C, 1), GPIO_OUT_LOW) /* C1 DP Hotplug Detect */ @@ -58,21 +57,17 @@ GPIO(LED_CHRG_L, PIN(C, 0), GPIO_OUT_HIGH) IOEX_INT(HDMI_CONN_HPD_3V3_DB, EXPIN(USBC_PORT_C1, 1, 0), GPIO_INT_BOTH, hdmi_hpd_interrupt) IOEX_INT(MST_HPD_OUT, EXPIN(USBC_PORT_C1, 0, 3), GPIO_INT_BOTH, mst_hpd_interrupt) -IOEX(USB_A0_RETIMER_EN, EXPIN(USBC_PORT_C0, 0, 0), GPIO_OUT_LOW) /* A0 Retimer Enable */ -IOEX(USB_A0_RETIMER_RST, EXPIN(USBC_PORT_C0, 0, 1), GPIO_OUT_LOW) /* A0 Retimer Reset */ IOEX(USB_C0_FAULT_ODL, EXPIN(USBC_PORT_C0, 0, 3), GPIO_ODR_HIGH) /* C0 Fault to SOC */ IOEX(USB_C0_TCPC_FASTSW_CTL_EN, EXPIN(USBC_PORT_C0, 0, 4), GPIO_OUT_LOW) /* C0 FastSwitch Control */ IOEX(USB_C1_FAULT_ODL, EXPIN(USBC_PORT_C0, 1, 0), GPIO_ODR_HIGH) /* C1 Fault to SOC */ IOEX(USB_C0_PPC_ILIM_3A_EN, EXPIN(USBC_PORT_C0, 1, 1), GPIO_OUT_LOW) /* C0 3A Current Limit Enable */ IOEX(USB_C0_SBU_FAULT_ODL, EXPIN(USBC_PORT_C0, 1, 2), GPIO_INPUT) /* C0 SBU Fault */ IOEX(KB_BL_EN, EXPIN(USBC_PORT_C0, 1, 3), GPIO_OUT_LOW) /* KB Backlight Enable */ -IOEX(USB_C0_DATA_EN, EXPIN(USBC_PORT_C0, 1, 4), GPIO_OUT_LOW) /* C0 Data Enable */ IOEX(EN_USB_A0_5V, EXPIN(USBC_PORT_C0, 1, 5), GPIO_OUT_LOW) /* A0 5V Source Enable */ IOEX(USB_A0_CHARGE_EN_L, EXPIN(USBC_PORT_C0, 1, 6), GPIO_OUT_HIGH) /* A0 5V High Current Enable */ IOEX(USB_C0_SBU_FLIP, EXPIN(USBC_PORT_C0, 1, 7), GPIO_OUT_LOW) /* C0 SBU Flip */ IOEX(USB_A1_RETIMER_EN, EXPIN(USBC_PORT_C1, 0, 0), GPIO_OUT_LOW) /* A1 Retimer Enable */ -IOEX(USB_A1_RETIMER_RST_DB, EXPIN(USBC_PORT_C1, 0, 1), GPIO_OUT_LOW) /* A1 Retimer Reset */ IOEX(USB_C1_HPD_IN_DB, EXPIN(USBC_PORT_C1, 0, 2), GPIO_OUT_LOW) /* C1 HPD */ IOEX(USB_C1_TCPC_FASTSW_CTL_EN, EXPIN(USBC_PORT_C1, 0, 4), GPIO_OUT_LOW) /* C1 FastSwitch Control */ IOEX(USB_C1_MUX_RST_DB, EXPIN(USBC_PORT_C1, 1, 1), GPIO_OUT_LOW) /* C1 Mux Reset */ @@ -119,7 +114,6 @@ ALTERNATE(PIN_MASK(B, BIT(2) | BIT(3)), 0, MODULE_I2C, 0) /* I2C7 */ ALTERNATE(PIN_MASK(4, BIT(2) | BIT(3)), 0, MODULE_ADC, 0) /* ADC2, ADC3 Temp Sensors */ -ALTERNATE(PIN_MASK(C, BIT(3)), 0, MODULE_PWM, 0) /* PWM0 LED */ ALTERNATE(PIN_MASK(C, BIT(4)), 0, MODULE_PWM, 0) /* PWM2 - EC_FAN_PWM */ ALTERNATE(PIN_MASK(8, BIT(0)), 0, MODULE_PWM, 0) /* PWM3 KB Backlight */ ALTERNATE(PIN_MASK(4, BIT(0)), 0, MODULE_PWM, 0) /* TA1 - EC_FAN_SPEED */ |