diff options
author | Matt_Wang <Matt_Wang@compal.corp-partner.google.com> | 2021-08-31 15:17:21 +0800 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-09-15 22:26:13 +0000 |
commit | 9981038037a413804884e938418d35fd0508309b (patch) | |
tree | b0f4c61209033c8164ca40a80f5ab35eb166a987 /board/felwinter/usbc_config.c | |
parent | 8f95bc2c19f88ce78146919ad1a08d4495ca66e0 (diff) | |
download | chrome-ec-9981038037a413804884e938418d35fd0508309b.tar.gz |
felwinter: Modify daughterboard config
Felwinter has two different daughterboards distinguish by FW config.
FW config fields bit[2:0]
2 = USB4
1 = USB3.2
USB4
TCPC: NCT3807
PPC: SY6862
BC12: PI3USB9201
Retimer: BB
USB3.2
TCPC: PS8815
PPC: SM5360A
BC12: PI3USB9201
Retimer: PS8815
BUG=b:196184152, b:197595441
BRANCH=brya
TEST=Test the C2 port can charge and use USB3.0/2.0 on Brya P2.
Signed-off-by: Matt_Wang <Matt_Wang@compal.corp-partner.google.com>
Change-Id: I210d37352b0b315d98c0e494fd2068fe40fcc376
Signed-off-by: Logan_Liao <logan_Liao@compal.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3132316
Reviewed-by: Logan Liao <logan_liao@compal.corp-partner.google.com>
Reviewed-by: Elmo Lan <elmo_lan@compal.corp-partner.google.com>
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Reviewed-by: Ko Ko <ko_ko@compal.corp-partner.google.com>
Tested-by: Logan Liao <logan_liao@compal.corp-partner.google.com>
Commit-Queue: Boris Mittelberg <bmbm@google.com>
Diffstat (limited to 'board/felwinter/usbc_config.c')
-rw-r--r-- | board/felwinter/usbc_config.c | 242 |
1 files changed, 93 insertions, 149 deletions
diff --git a/board/felwinter/usbc_config.c b/board/felwinter/usbc_config.c index 818397aa31..df9772e6f0 100644 --- a/board/felwinter/usbc_config.c +++ b/board/felwinter/usbc_config.c @@ -37,11 +37,11 @@ #define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) /* USBC TCPC configuration */ -const struct tcpc_config_t tcpc_config[] = { - [USBC_PORT_C0] = { +struct tcpc_config_t tcpc_config[] = { + [USBC_PORT_C2] = { .bus_type = EC_BUS_TYPE_I2C, .i2c_info = { - .port = I2C_PORT_USB_C0_C2_TCPC, + .port = I2C_PORT_USB_C2_TCPC, .addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS, }, .drv = &nct38xx_tcpm_drv, @@ -58,24 +58,26 @@ const struct tcpc_config_t tcpc_config[] = { .flags = TCPC_FLAGS_TCPCI_REV2_0 | TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V, }, - [USBC_PORT_C2] = { - .bus_type = EC_BUS_TYPE_I2C, - .i2c_info = { - .port = I2C_PORT_USB_C0_C2_TCPC, - .addr_flags = NCT38XX_I2C_ADDR2_1_FLAGS, - }, - .drv = &nct38xx_tcpm_drv, - .flags = TCPC_FLAGS_TCPCI_REV2_0, - }, }; BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == USBC_PORT_COUNT); BUILD_ASSERT(CONFIG_USB_PD_PORT_MAX_COUNT == USBC_PORT_COUNT); +struct tcpc_config_t tcpc_config_c1 = { + .bus_type = EC_BUS_TYPE_I2C, + .i2c_info = { + .port = I2C_PORT_USB_C1_TCPC, + .addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS, + }, + .drv = &nct38xx_tcpm_drv, + .flags = TCPC_FLAGS_TCPCI_REV2_0 | + TCPC_FLAGS_NO_DEBUG_ACC_CONTROL, +}; + /* USBC PPC configuration */ struct ppc_config_t ppc_chips[] = { - [USBC_PORT_C0] = { - .i2c_port = I2C_PORT_USB_C0_C2_PPC, - .i2c_addr_flags = SYV682X_ADDR0_FLAGS, + [USBC_PORT_C2] = { + .i2c_port = I2C_PORT_USB_C2_PPC, + .i2c_addr_flags = SYV682X_ADDR2_FLAGS, .drv = &syv682x_drv, }, [USBC_PORT_C1] = { @@ -84,28 +86,26 @@ struct ppc_config_t ppc_chips[] = { .i2c_addr_flags = NX20P3483_ADDR2_FLAGS, .drv = &nx20p348x_drv, }, - [USBC_PORT_C2] = { - .i2c_port = I2C_PORT_USB_C0_C2_PPC, - /* - * b/179987870 - * schematics I2C map says ADDR3 - */ - .i2c_addr_flags = SYV682X_ADDR2_FLAGS, - .drv = &syv682x_drv, - }, }; BUILD_ASSERT(ARRAY_SIZE(ppc_chips) == USBC_PORT_COUNT); unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); +struct ppc_config_t ppc_chips_c1 = { + .i2c_port = I2C_PORT_USB_C1_PPC, + .i2c_addr_flags = SYV682X_ADDR0_FLAGS, + .drv = &syv682x_drv, +}; + /* USBC mux configuration - Alder Lake includes internal mux */ -static const struct usb_mux usbc0_tcss_usb_mux = { - .usb_port = USBC_PORT_C0, +static const struct usb_mux usbc2_tcss_usb_mux = { + .usb_port = USBC_PORT_C2, .driver = &virtual_usb_mux_driver, .hpd_update = &virtual_hpd_update, }; -static const struct usb_mux usbc2_tcss_usb_mux = { - .usb_port = USBC_PORT_C2, + +static const struct usb_mux usbc1_tcss_usb_mux = { + .usb_port = USBC_PORT_C1, .driver = &virtual_usb_mux_driver, .hpd_update = &virtual_hpd_update, }; @@ -121,13 +121,13 @@ static const struct usb_mux usbc1_usb3_db_retimer = { .hpd_update = &ps8xxx_tcpc_update_hpd_status, }; -const struct usb_mux usb_muxes[] = { - [USBC_PORT_C0] = { - .usb_port = USBC_PORT_C0, +struct usb_mux usb_muxes[] = { + [USBC_PORT_C2] = { + .usb_port = USBC_PORT_C2, .driver = &bb_usb_retimer, - .i2c_port = I2C_PORT_USB_C0_C2_MUX, - .i2c_addr_flags = USBC_PORT_C0_BB_RETIMER_I2C_ADDR, - .next_mux = &usbc0_tcss_usb_mux, + .i2c_port = I2C_PORT_USB_C2_MUX, + .i2c_addr_flags = USBC_PORT_BB_RETIMER_I2C_ADDR, + .next_mux = &usbc2_tcss_usb_mux, }, [USBC_PORT_C1] = { /* PS8815 DB */ @@ -136,30 +136,27 @@ const struct usb_mux usb_muxes[] = { .hpd_update = &virtual_hpd_update, .next_mux = &usbc1_usb3_db_retimer, }, - [USBC_PORT_C2] = { - .usb_port = USBC_PORT_C2, - .driver = &bb_usb_retimer, - .i2c_port = I2C_PORT_USB_C0_C2_MUX, - .i2c_addr_flags = USBC_PORT_C2_BB_RETIMER_I2C_ADDR, - .next_mux = &usbc2_tcss_usb_mux, - }, }; BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT); +struct usb_mux usb_muxes_c1 = { + .usb_port = USBC_PORT_C1, + .driver = &bb_usb_retimer, + .i2c_port = I2C_PORT_USB_C1_MUX, + .i2c_addr_flags = USBC_PORT_BB_RETIMER_I2C_ADDR, + .next_mux = &usbc1_tcss_usb_mux, +}; + /* BC1.2 charger detect configuration */ const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = { - [USBC_PORT_C0] = { - .i2c_port = I2C_PORT_USB_C0_C2_BC12, - .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, + [USBC_PORT_C2] = { + .i2c_port = I2C_PORT_USB_C2_BC12, + .i2c_addr_flags = PI3USB9201_I2C_ADDR_1_FLAGS, }, [USBC_PORT_C1] = { .i2c_port = I2C_PORT_USB_C1_BC12, .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, }, - [USBC_PORT_C2] = { - .i2c_port = I2C_PORT_USB_C0_C2_BC12, - .i2c_addr_flags = PI3USB9201_I2C_ADDR_1_FLAGS, - }, }; BUILD_ASSERT(ARRAY_SIZE(pi3usb9201_bc12_chips) == USBC_PORT_COUNT); @@ -173,30 +170,18 @@ BUILD_ASSERT(ARRAY_SIZE(pi3usb9201_bc12_chips) == USBC_PORT_COUNT); */ struct ioexpander_config_t ioex_config[] = { - [IOEX_C0_NCT38XX] = { - .i2c_host_port = I2C_PORT_USB_C0_C2_TCPC, + [IOEX_C1_NCT38XX] = { + .i2c_host_port = I2C_PORT_USB_C1_TCPC, .i2c_addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS, .drv = &nct38xx_ioexpander_drv, .flags = IOEX_FLAGS_DISABLED, }, [IOEX_C2_NCT38XX] = { - .i2c_host_port = I2C_PORT_USB_C0_C2_TCPC, - .i2c_addr_flags = NCT38XX_I2C_ADDR2_1_FLAGS, - .drv = &nct38xx_ioexpander_drv, - .flags = IOEX_FLAGS_DISABLED, - }, - [IOEX_ID_1_C0_NCT38XX] = { - .i2c_host_port = I2C_PORT_USB_C0_C2_TCPC, + .i2c_host_port = I2C_PORT_USB_C2_TCPC, .i2c_addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS, .drv = &nct38xx_ioexpander_drv, .flags = IOEX_FLAGS_DISABLED, }, - [IOEX_ID_1_C2_NCT38XX] = { - .i2c_host_port = I2C_PORT_USB_C0_C2_TCPC, - .i2c_addr_flags = NCT38XX_I2C_ADDR2_1_FLAGS, - .drv = &nct38xx_ioexpander_drv, - .flags = IOEX_FLAGS_DISABLED, - }, }; BUILD_ASSERT(ARRAY_SIZE(ioex_config) == CONFIG_IO_EXPANDER_PORT_COUNT); @@ -215,19 +200,12 @@ __override int bb_retimer_power_enable(const struct usb_mux *me, bool enable) { enum ioex_signal rst_signal; - if (me->usb_port == USBC_PORT_C0) { - if (get_board_id() == 1) - rst_signal = IOEX_ID_1_USB_C0_RT_RST_ODL; - else - rst_signal = IOEX_USB_C0_RT_RST_ODL; - } else if (me->usb_port == USBC_PORT_C2) { - if (get_board_id() == 1) - rst_signal = IOEX_ID_1_USB_C2_RT_RST_ODL; - else - rst_signal = IOEX_USB_C2_RT_RST_ODL; - } else { + if (me->usb_port == USBC_PORT_C1) + rst_signal = GPIO_USB_C1_RT_RST_R_ODL; + else if (me->usb_port == USBC_PORT_C2) + rst_signal = IOEX_USB_C2_RT_RST_ODL; + else return EC_ERROR_INVAL; - } /* * We do not have a load switch for the burnside bridge chips, @@ -247,20 +225,6 @@ __override int bb_retimer_power_enable(const struct usb_mux *me, bool enable) * which powers I2C controller within retimer */ msleep(1); - if (get_board_id() == 1) { - int val; - - /* - * Check if we were able to deassert - * reset. Board ID 1 uses a GPIO that is - * uncontrollable when a debug accessory is - * connected. - */ - if (ioex_get_level(rst_signal, &val) != EC_SUCCESS) - return EC_ERROR_UNKNOWN; - if (val != 1) - return EC_ERROR_NOT_POWERED; - } } else { ioex_set_level(rst_signal, 0); msleep(1); @@ -270,22 +234,16 @@ __override int bb_retimer_power_enable(const struct usb_mux *me, bool enable) void board_reset_pd_mcu(void) { - enum gpio_signal tcpc_rst; - - if (get_board_id() == 1) - tcpc_rst = GPIO_ID_1_USB_C0_C2_TCPC_RST_ODL; - else - tcpc_rst = GPIO_USB_C0_C2_TCPC_RST_ODL; - /* * TODO(b/179648104): figure out correct timing */ - gpio_set_level(tcpc_rst, 0); - if (ec_cfg_usb_db_type() != DB_USB_ABSENT) { + gpio_set_level(GPIO_USB_C0_C2_TCPC_RST_ODL, 0); + gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 0); + + if (ec_cfg_usb_db_type() == DB_USB4_NCT3807) gpio_set_level(GPIO_USB_C1_RST_ODL, 0); - gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 0); - } + /* * delay for power-on to reset-off and min. assertion time @@ -293,11 +251,11 @@ void board_reset_pd_mcu(void) msleep(20); - gpio_set_level(tcpc_rst, 1); - if (ec_cfg_usb_db_type() != DB_USB_ABSENT) { + gpio_set_level(GPIO_USB_C0_C2_TCPC_RST_ODL, 1); + gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 1); + + if (ec_cfg_usb_db_type() == DB_USB4_NCT3807) gpio_set_level(GPIO_USB_C1_RST_ODL, 1); - gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 1); - } /* wait for chips to come up */ @@ -321,31 +279,22 @@ static void board_tcpc_init(void) * C0/C2 TCPC, so they must be set up after the TCPC has * been taken out of reset. */ - if (get_board_id() == 1) { - enable_ioex(IOEX_ID_1_C0_NCT38XX); - enable_ioex(IOEX_ID_1_C2_NCT38XX); - } else { - enable_ioex(IOEX_C0_NCT38XX); - enable_ioex(IOEX_C2_NCT38XX); - } + if (ec_cfg_usb_db_type() == DB_USB4_NCT3807) + enable_ioex(IOEX_C1_NCT38XX); + enable_ioex(IOEX_C2_NCT38XX); } /* Enable PPC interrupts. */ - gpio_enable_interrupt(GPIO_USB_C0_PPC_INT_ODL); + gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL); gpio_enable_interrupt(GPIO_USB_C2_PPC_INT_ODL); /* Enable TCPC interrupts. */ - gpio_enable_interrupt(GPIO_USB_C0_C2_TCPC_INT_ODL); + gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL); + gpio_enable_interrupt(GPIO_USB_C2_TCPC_INT_ODL); /* Enable BC1.2 interrupts. */ - gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL); + gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_ODL); gpio_enable_interrupt(GPIO_USB_C2_BC12_INT_ODL); - - if (ec_cfg_usb_db_type() != DB_USB_ABSENT) { - gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_ODL); - } } DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_CHIPSET); @@ -353,11 +302,10 @@ uint16_t tcpc_get_alert_status(void) { uint16_t status = 0; - if (gpio_get_level(GPIO_USB_C0_C2_TCPC_INT_ODL) == 0) - status |= PD_STATUS_TCPC_ALERT_0 | PD_STATUS_TCPC_ALERT_2; + if (gpio_get_level(GPIO_USB_C2_TCPC_INT_ODL) == 0) + status |= PD_STATUS_TCPC_ALERT_0; - if ((ec_cfg_usb_db_type() != DB_USB_ABSENT) && - gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL) == 0) + if (gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL) == 0) status |= PD_STATUS_TCPC_ALERT_1; return status; @@ -365,25 +313,20 @@ uint16_t tcpc_get_alert_status(void) int ppc_get_alert_status(int port) { - if (port == USBC_PORT_C0) - return gpio_get_level(GPIO_USB_C0_PPC_INT_ODL) == 0; - else if ((port == USBC_PORT_C1) && - (ec_cfg_usb_db_type() != DB_USB_ABSENT)) - return gpio_get_level(GPIO_USB_C1_PPC_INT_ODL) == 0; - else if (port == USBC_PORT_C2) + if (port == USBC_PORT_C2) return gpio_get_level(GPIO_USB_C2_PPC_INT_ODL) == 0; + else if (port == USBC_PORT_C1) + return gpio_get_level(GPIO_USB_C1_PPC_INT_ODL) == 0; return 0; } void tcpc_alert_event(enum gpio_signal signal) { switch (signal) { - case GPIO_USB_C0_C2_TCPC_INT_ODL: - schedule_deferred_pd_interrupt(USBC_PORT_C0); + case GPIO_USB_C2_TCPC_INT_ODL: + schedule_deferred_pd_interrupt(USBC_PORT_C2); break; case GPIO_USB_C1_TCPC_INT_ODL: - if (ec_cfg_usb_db_type() == DB_USB_ABSENT) - break; schedule_deferred_pd_interrupt(USBC_PORT_C1); break; default: @@ -394,16 +337,11 @@ void tcpc_alert_event(enum gpio_signal signal) void bc12_interrupt(enum gpio_signal signal) { switch (signal) { - case GPIO_USB_C0_BC12_INT_ODL: - task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12); - break; case GPIO_USB_C1_BC12_INT_ODL: - if (ec_cfg_usb_db_type() == DB_USB_ABSENT) - break; - task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12); + task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12); break; case GPIO_USB_C2_BC12_INT_ODL: - task_set_event(TASK_ID_USB_CHG_P2, USB_CHG_EVENT_BC12); + task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12); break; default: break; @@ -413,17 +351,14 @@ void bc12_interrupt(enum gpio_signal signal) void ppc_interrupt(enum gpio_signal signal) { switch (signal) { - case GPIO_USB_C0_PPC_INT_ODL: - syv682x_interrupt(USBC_PORT_C0); - break; case GPIO_USB_C1_PPC_INT_ODL: switch (ec_cfg_usb_db_type()) { - case DB_USB_ABSENT: - case DB_USB_ABSENT2: - break; case DB_USB3_PS8815: nx20p348x_interrupt(USBC_PORT_C1); break; + case DB_USB4_NCT3807: + syv682x_interrupt(USBC_PORT_C1); + break; } break; case GPIO_USB_C2_PPC_INT_ODL: @@ -443,12 +378,14 @@ void retimer_interrupt(enum gpio_signal signal) __override bool board_is_dts_port(int port) { - return port == USBC_PORT_C0; + return port == USBC_PORT_C2; } __override bool board_is_tbt_usb4_port(int port) { - if (port == USBC_PORT_C0 || port == USBC_PORT_C2) + if ((port == USBC_PORT_C2) || + ((port == USBC_PORT_C1) && + (ec_cfg_usb_db_type() == DB_USB4_NCT3807))) return true; return false; @@ -461,3 +398,10 @@ __override enum tbt_compat_cable_speed board_get_max_tbt_speed(int port) return TBT_SS_TBT_GEN3; } + +void db_update_usb4_config_from_config(void) +{ + tcpc_config[USBC_PORT_C1] = tcpc_config_c1; + ppc_chips[USBC_PORT_C1] = ppc_chips_c1; + usb_muxes[USBC_PORT_C1] = usb_muxes_c1; +} |