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| author | Patryk Duda <pdk@semihalf.com> | 2020-11-23 16:30:37 +0100 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-11-23 18:40:49 +0000 |
| commit | 264c5edd3df88195cdbe9e1f81aba6f0d36d8cdb (patch) | |
| tree | 8aaa2a2ec20552126833a58a2de23c293cf510e5 /board/flapjack | |
| parent | 5421f90715c09ef638ce3d9b0661d51e8108017f (diff) | |
| download | chrome-ec-264c5edd3df88195cdbe9e1f81aba6f0d36d8cdb.tar.gz | |
PD: Fix passing information about polarity when DTS is connected
Commit 7dec638eb577aaa3a00d0551d73c276b94ebacb2 introduced two polarity
modes POLARITY_CC1_DTS, POLARITY_CC2_DTS in enum tcpc_cc_polarity, but
in many places there was an assumption that value other than 0 means
that cable is inverted, the most notable example is usb_mux_set(). As a
result kernel sometimes was not reporting SuperSpeed depending on if
cable was inverted or not.
This patch adds mapping from polarity with DTS to polarity without DTS
where necessary.
BUG=b:162254118
BRANCH=none
TEST=Connect ServoV4 to eve and run servod. Make sure that USB-C muxer
is connects USB3.0 lines (servod should set it).
Flash EC ToT on eve. Boot ChromeOS and go to Developer Console.
Run 'dmesg -w', check if device (eg. ethernet adapter) is attached as
SuperSpeed device. Unplug cable, invert and plug again. Kernel
should report that device is attached as SuperSpeed.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: I354ef7047240cc8b5db01936b3780fae7387edb5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2555157
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'board/flapjack')
| -rw-r--r-- | board/flapjack/usb_pd_policy.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/board/flapjack/usb_pd_policy.c b/board/flapjack/usb_pd_policy.c index 3603b6c931..ef2156f1fe 100644 --- a/board/flapjack/usb_pd_policy.c +++ b/board/flapjack/usb_pd_policy.c @@ -83,7 +83,8 @@ __override void svdm_dp_post_config(int port) gpio_set_level(GPIO_USB_C0_HPD_OD, 1); gpio_set_level(GPIO_USB_C0_DP_OE_L, 0); - gpio_set_level(GPIO_USB_C0_DP_POLARITY, pd_get_polarity(port)); + gpio_set_level(GPIO_USB_C0_DP_POLARITY, + polarity_rm_dts(pd_get_polarity(port))); /* set the minimum time delay (2ms) for the next HPD IRQ */ svdm_hpd_deadline[port] = get_time().val + HPD_USTREAM_DEBOUNCE_LVL; @@ -106,7 +107,7 @@ __override int svdm_dp_attention(int port, uint32_t *payload) } usb_mux_set(port, lvl ? USB_PD_MUX_DP_ENABLED : USB_PD_MUX_NONE, - USB_SWITCH_CONNECT, pd_get_polarity(port)); + USB_SWITCH_CONNECT, polarity_rm_dts(pd_get_polarity(port))); usb_mux_hpd_update(port, lvl, irq); @@ -122,7 +123,8 @@ __override int svdm_dp_attention(int port, uint32_t *payload) gpio_set_level(GPIO_USB_C0_HPD_OD, 1); gpio_set_level(GPIO_USB_C0_DP_OE_L, 0); - gpio_set_level(GPIO_USB_C0_DP_POLARITY, pd_get_polarity(port)); + gpio_set_level(GPIO_USB_C0_DP_POLARITY, + polarity_rm_dts(pd_get_polarity(port))); /* set the minimum time delay (2ms) for the next HPD IRQ */ svdm_hpd_deadline[port] = get_time().val + @@ -133,7 +135,8 @@ __override int svdm_dp_attention(int port, uint32_t *payload) } else { gpio_set_level(GPIO_USB_C0_HPD_OD, lvl); gpio_set_level(GPIO_USB_C0_DP_OE_L, !lvl); - gpio_set_level(GPIO_USB_C0_DP_POLARITY, pd_get_polarity(port)); + gpio_set_level(GPIO_USB_C0_DP_POLARITY, + polarity_rm_dts(pd_get_polarity(port))); /* set the minimum time delay (2ms) for the next HPD IRQ */ svdm_hpd_deadline[port] = get_time().val + HPD_USTREAM_DEBOUNCE_LVL; |