Fleex: Update EC GPIOs for Fleex EVT

This change sets GPIO83 to the new USB_C0_PD_RST.  The GPIO flags are
set according to whether the board is a proto (where it is acting as
USB_OTG and needs to be open drain) or EVT (where it is an active-high
signal).  This also adds CAM_SOC_EC_SYNC as an input for now.

BRANCH=None
BUG=b:112458646
TEST=Loaded onto fleex proto to verify proto board was detected and
USB_OTG set to open drain

Change-Id: Iffa4762f46d545a0431a27f2c1893f219695d367
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1180354
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>

1 files changed, 30 insertions, 0 deletions

diff --git a/board/fleex/board.c b/board/fleex/board.c
index 9a794c518a..11564aa73d 100644
--- a/board/fleex/board.c
+++ b/board/fleex/board.c
@@ -243,3 +243,33 @@ void lid_angle_peripheral_enable(int enable)
 	keyboard_scan_enable(enable, KB_SCAN_DISABLE_LID_ANGLE);
 }
 #endif
+
+/*
+ * Set gpio flags based on board ID, can be removed when proto is no longer
+ * supported
+ */
+static void update_gpios_from_board_id(void)
+{
+	uint32_t board_id = 0;
+
+	/* Errors will count as board_id 0 */
+	cbi_get_board_version(&board_id);
+
+	if (board_id == 0) {
+		/*
+		 * USB2_OTG_ID is a 1.8V pin on the SoC side with an internal
+		 * pull-up. However, it is 3.3V on the EC side. So, configure
+		 * it as ODR so that the EC never drives it high.
+		 */
+		gpio_set_flags(GPIO_USB_C0_PD_RST, GPIO_ODR_LOW);
+	} else {
+		int flags = GPIO_OUTPUT;
+
+		if (!system_is_reboot_warm() && !system_jumped_to_this_image())
+			flags |= GPIO_LOW;
+
+		gpio_set_flags(GPIO_USB_C0_PD_RST, flags);
+	}
+}
+
+DECLARE_HOOK(HOOK_INIT, update_gpios_from_board_id, HOOK_PRIO_INIT_I2C + 1);