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author | Matt_Wang <Matt_Wang@compal.corp-partner.google.com> | 2020-07-10 14:39:24 +0800 |
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committer | Commit Bot <commit-bot@chromium.org> | 2020-11-17 05:06:56 +0000 |
commit | f0ed846e721e7c7fc6fbf4b49a3afc485d8512ac (patch) | |
tree | 890590ea6800941a30ed4f511841946ea519870c /board/fleex/gpio.inc | |
parent | 7bd58571378a4cf2aeb0e93b67f645b8084c9b80 (diff) | |
download | chrome-ec-f0ed846e721e7c7fc6fbf4b49a3afc485d8512ac.tar.gz |
Fleex: enable 2nd ppc source syv682x
This patch adds 2nd ppc source syv682x base on GPIO97 status.
BUG=b:160139798
BRANCH=octopus
TEST=The GPIO97 high can switch PPC from NPX to syv682x code.
Change-Id: If813ed6993338981417d7271bf0920f15bdb5e1a
Signed-off-by: Matt_Wang <Matt_Wang@compal.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2291451
Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
Reviewed-by: Marco Chen <marcochen@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
Commit-Queue: Matt Wang <matt_wang@compal.corp-partner.google.com>
Diffstat (limited to 'board/fleex/gpio.inc')
-rw-r--r-- | board/fleex/gpio.inc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/board/fleex/gpio.inc b/board/fleex/gpio.inc index 726f2da951..efedd6989b 100644 --- a/board/fleex/gpio.inc +++ b/board/fleex/gpio.inc @@ -152,11 +152,12 @@ GPIO(EC_GPIO03, PIN(0, 3), GPIO_INPUT) /* TP only */ /* MKBP event synchronization */ GPIO(EC_INT_L, PIN(9, 4), GPIO_ODR_HIGH) /* EC_AP_INT_ODL */ +GPIO(PPC_ID, PIN(9, 7), GPIO_INPUT | GPIO_PULL_DOWN) /* PPC ID Pin */ + /* Unused Pins */ GPIO(CHARGER_PMON, PIN(4, 2), GPIO_INPUT) GPIO(CHARGER_IADP, PIN(4, 3), GPIO_INPUT) GPIO(EC_GPIO57, PIN(5, 7), GPIO_INPUT | GPIO_PULL_UP) /* TP Only */ -GPIO(EC_GPIO97, PIN(9, 7), GPIO_INPUT | GPIO_PULL_UP) /* TP Only */ GPIO(EC_I2S_SFRM, PIN(A, 5), GPIO_INPUT | GPIO_SEL_1P8V) GPIO(EC_I2S_SCLK, PIN(A, 7), GPIO_INPUT | GPIO_SEL_1P8V) GPIO(EC_I2S_TX_PCH_RX, PIN(B, 0), GPIO_INPUT | GPIO_SEL_1P8V) |