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| author | Scott Chao <scott_chao@wistron.corp-partner.google.com> | 2021-07-17 17:45:45 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-07-22 23:25:20 +0000 |
| commit | 679078086cf143cf93ef04b47cf21555cabaa534 (patch) | |
| tree | e2b940acb058579e14e48c7b9ab5c5e7a6f38c53 /board/gimble | |
| parent | a56388daeb14ec92642fabb36f3d8dab693fc6b3 (diff) | |
| download | chrome-ec-679078086cf143cf93ef04b47cf21555cabaa534.tar.gz | |
gimble: add tcpc0 reset
BUG=b:194260437
BRANCH=none
TEST=make -j BOARD=gimble
Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com>
Change-Id: I35b8261aa486548f20a9d991f94008656c0c006b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3034795
Reviewed-by: caveh jalali <caveh@chromium.org>
Diffstat (limited to 'board/gimble')
| -rw-r--r-- | board/gimble/gpio.inc | 2 | ||||
| -rw-r--r-- | board/gimble/usbc_config.c | 20 |
2 files changed, 13 insertions, 9 deletions
diff --git a/board/gimble/gpio.inc b/board/gimble/gpio.inc index 28699b5b17..a3b0a2588d 100644 --- a/board/gimble/gpio.inc +++ b/board/gimble/gpio.inc @@ -68,7 +68,7 @@ GPIO(IMVP9_VRRDY_OD, PIN(4, 3), GPIO_INPUT) GPIO(PCH_PWROK, PIN(7, 2), GPIO_OUT_LOW) GPIO(POWER_LED_GATE, PIN(B, 6), GPIO_OUT_LOW) /* Power LED: White */ GPIO(SYS_RST_ODL, PIN(C, 5), GPIO_ODR_HIGH) -GPIO(USB_C0_TCPC_RST_ODL, PIN(A, 7), GPIO_OUT_LOW) +GPIO(USB_C0_TCPC_RST_ODL, PIN(A, 7), GPIO_ODR_LOW) GPIO(USB_C1_FRS_EN, PIN(9, 4), GPIO_OUT_LOW) GPIO(USB_C1_RT_RST_R_ODL, PIN(0, 2), GPIO_ODR_LOW) GPIO(VCCST_PWRGD_OD, PIN(A, 4), GPIO_ODR_LOW) diff --git a/board/gimble/usbc_config.c b/board/gimble/usbc_config.c index d5e228876e..83042ab91e 100644 --- a/board/gimble/usbc_config.c +++ b/board/gimble/usbc_config.c @@ -148,18 +148,10 @@ void config_usb_db_type(void) CPRINTS("Configured USB DB type number is %d", db_type); } -static enum gpio_signal ps8xxx_rst_odl = GPIO_USB_C1_RT_RST_R_ODL; - static void ps8815_reset(void) { int val; - gpio_set_level(ps8xxx_rst_odl, 0); - msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS, - PS8815_PWR_H_RST_H_DELAY_MS)); - gpio_set_level(ps8xxx_rst_odl, 1); - msleep(PS8815_FW_INIT_DELAY_MS); - CPRINTS("%s: patching ps8815 registers", __func__); if (i2c_read8(I2C_PORT_USB_C1_TCPC, @@ -177,6 +169,18 @@ static void ps8815_reset(void) void board_reset_pd_mcu(void) { + /* Port0 */ + gpio_set_level(GPIO_USB_C0_TCPC_RST_ODL, 0); + gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 0); + msleep(GENERIC_MAX(PS8XXX_RESET_DELAY_MS, + PS8815_PWR_H_RST_H_DELAY_MS)); + + gpio_set_level(GPIO_USB_C0_TCPC_RST_ODL, 1); + gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 1); + /* wait for chips to come up */ + msleep(PS8815_FW_INIT_DELAY_MS); + + /* Port1 */ ps8815_reset(); usb_mux_hpd_update(USBC_PORT_C1, 0, 0); } |