diff options
| author | Shawn Nematbakhsh <shawnn@chromium.org> | 2015-05-01 10:45:48 -0700 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-05-12 02:50:16 +0000 |
| commit | 3a36c29e6756231f2fb1fdd26447d519cbd5b26a (patch) | |
| tree | 755259729196337d469bfef0d0a4ff16fc809276 /board/glados/gpio.inc | |
| parent | a394302e4aef0349c30cbccf6b4623bcb3dda5bf (diff) | |
| download | chrome-ec-3a36c29e6756231f2fb1fdd26447d519cbd5b26a.tar.gz | |
glados: Initial mainboard commitstabilize-7060.B
BUG=chrome-os-partner:39510
TEST=Compile Only
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: If470b00fec56db0884dbd4c9974140951fc214fd
Reviewed-on: https://chromium-review.googlesource.com/268780
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Diffstat (limited to 'board/glados/gpio.inc')
| -rw-r--r-- | board/glados/gpio.inc | 157 |
1 files changed, 157 insertions, 0 deletions
diff --git a/board/glados/gpio.inc b/board/glados/gpio.inc new file mode 100644 index 0000000000..9801b60a27 --- /dev/null +++ b/board/glados/gpio.inc @@ -0,0 +1,157 @@ +/* -*- mode:c -*- + * + * Copyright 2015 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +GPIO_INT(LID_OPEN, PORT(2), 7, GPIO_INT_BOTH_DSLEEP, lid_interrupt) +GPIO_INT(AC_PRESENT, PORT(3), 0, GPIO_INT_BOTH_DSLEEP, extpower_interrupt) +GPIO_INT(WP_L, PORT(3), 3, GPIO_INT_BOTH, switch_interrupt) +/* Buffered power button input from PMIC / ROP_EC_PWR_BTN_L_R */ +GPIO_INT(POWER_BUTTON_L, PORT(3), 5, GPIO_INT_BOTH_DSLEEP, power_button_interrupt) +/* RSMRST from PMIC */ +GPIO_INT(RSMRST_L_PGOOD, PORT(6), 3, GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(PCH_SLP_S4_L, PORT(20), 0, GPIO_INT_BOTH_DSLEEP | GPIO_PULL_UP, power_signal_interrupt) +GPIO_INT(PCH_SLP_S3_L, PORT(20), 6, GPIO_INT_BOTH_DSLEEP | GPIO_PULL_UP, power_signal_interrupt) +GPIO_INT(PCH_SLP_S0_L, PORT(21), 1, GPIO_INT_BOTH | GPIO_PULL_UP, power_signal_interrupt) +GPIO_INT(PCH_SLP_SUS_L, PORT(1), 2, GPIO_INT_BOTH | GPIO_PULL_UP, power_signal_interrupt) +GPIO_INT(VOLUME_UP_L, PORT(3), 1, GPIO_INT_FALLING | GPIO_PULL_UP, button_interrupt) +GPIO_INT(VOLUME_DOWN_L, PORT(4), 7, GPIO_INT_FALLING | GPIO_PULL_UP, button_interrupt) +GPIO_INT(PMIC_INT_L, PORT(5), 0, GPIO_INT_FALLING, power_signal_interrupt) +GPIO_INT(PD_MCU_INT, PORT(12), 2, GPIO_INT_RISING | GPIO_INT_DSLEEP, pd_mcu_interrupt) +GPIO_INT(USB_C0_VBUS_WAKE, PORT(15), 2, GPIO_INT_BOTH, vbus1_evt) +GPIO_INT(USB_C1_VBUS_WAKE, PORT(12), 3, GPIO_INT_BOTH, vbus0_evt) +GPIO_INT(USB_C0_BC12_INT_L, PORT(12), 4, GPIO_INT_FALLING, usb0_evt) +GPIO_INT(USB_C1_BC12_INT_L, PORT(14), 5, GPIO_INT_FALLING, usb1_evt) +/* Delayed PWR_OK from PMIC */ +GPIO_INT(PMIC_DPWROK, PORT(5), 5, GPIO_INT_BOTH, power_signal_interrupt) + +GPIO(PD_RST_L, PORT(13), 0, GPIO_ODR_HIGH) +GPIO(USB2_OTG_ID, PORT(1), 3, GPIO_ODR_LOW) +/* I2C pins - these will be reconfigured for alternate function below */ +GPIO(I2C0_0_SCL, PORT(1), 5, GPIO_INPUT) +GPIO(I2C0_0_SDA, PORT(1), 6, GPIO_INPUT) +GPIO(I2C0_1_SCL, PORT(13), 4, GPIO_INPUT) +GPIO(I2C0_1_SDA, PORT(1), 7, GPIO_INPUT) +GPIO(I2C1_SCL, PORT(2), 2, GPIO_INPUT) +GPIO(I2C1_SDA, PORT(2), 3, GPIO_INPUT) +GPIO(I2C2_SCL, PORT(2), 0, GPIO_INPUT) +GPIO(I2C2_SDA, PORT(2), 1, GPIO_INPUT) +GPIO(I2C3_SCL, PORT(2), 4, GPIO_INPUT) +GPIO(I2C3_SDA, PORT(2), 5, GPIO_INPUT) +GPIO(PCH_SCI_L, PORT(2), 6, GPIO_ODR_HIGH) +/* KB BL PWM, only connected to TP */ +GPIO(PWM_KBLIGHT, PORT(3), 4, GPIO_OUT_LOW) +GPIO(USB1_ENABLE, PORT(3), 6, GPIO_OUT_HIGH) +GPIO(USB2_ENABLE, PORT(6), 7, GPIO_OUT_HIGH) +GPIO(ENTERING_RW, PORT(4), 1, GPIO_OUT_LOW) +GPIO(PCH_SMI_L, PORT(4), 4, GPIO_ODR_HIGH) +GPIO(PCH_PWRBTN_L, PORT(4), 5, GPIO_OUTPUT) +GPIO(USB_C0_DP_HPD, PORT(4), 6, GPIO_OUT_LOW) +GPIO(USB_C1_DP_HPD, PORT(5), 1, GPIO_OUT_LOW) +GPIO(CPU_PROCHOT, PORT(5), 2, GPIO_OUT_LOW) +GPIO(ENABLE_TOUCHPAD, PORT(5), 3, GPIO_OUT_LOW) +GPIO(USB_PD_WAKE, PORT(6), 0, GPIO_OUT_LOW) +/* When asserted, ME does not lock security descriptor */ +GPIO(PCH_SEC_DISABLE_L, PORT(6), 5, GPIO_OUT_HIGH) +GPIO(PCH_WAKE_L, PORT(6), 6, GPIO_ODR_HIGH) +GPIO(EC_FAN1_TTACH, PORT(10), 5, GPIO_INPUT) +/* Fan PWM output - NC / testing only */ +GPIO(EC_FAN1_PWM, PORT(13), 6, GPIO_OUT_LOW) +GPIO(PCH_ACOK, PORT(11), 0, GPIO_OUT_LOW) +/* Interrupts from accelerometer / gyro -- not yet implemented */ +GPIO(ACCEL1_INT, PORT(16), 1, GPIO_INPUT) +GPIO(ACCEL2_INT, PORT(12), 7, GPIO_INPUT) +GPIO(ACCEL3_INT, PORT(14), 7, GPIO_INPUT) +GPIO(ACCEL4_INT, PORT(13), 3, GPIO_INPUT) +GPIO(WLAN_OFF_L, PORT(13), 2, GPIO_OUT_LOW) +/* RCIN# line to PCH for 8042 emulation */ +GPIO(PCH_RCIN_L, PORT(13), 5, GPIO_ODR_HIGH) +GPIO(USB2_OTG_VBUSSENSE, PORT(14), 0, GPIO_OUT_LOW) +/* Sensor input for KB PROX - UNUSED */ +GPIO(KB_PROX_INT_L, PORT(14), 1, GPIO_INPUT) +GPIO(PCH_RSMRST_L, PORT(14), 3, GPIO_OUT_LOW) +/* prochot input from devices */ +GPIO(PLATFORM_EC_PROCHOT, PORT(15), 1, GPIO_INPUT) +GPIO(USB_C0_5V_EN, PORT(15), 4, GPIO_OUT_LOW) +GPIO(USB_C1_5V_EN, PORT(20), 4, GPIO_OUT_LOW) +GPIO(USB_C0_CHARGE_EN_L, PORT(6), 4, GPIO_OUT_LOW) +GPIO(USB_C1_CHARGE_EN_L, PORT(15), 7, GPIO_OUT_LOW) +GPIO(PP1800_DX_SENSOR_EN, PORT(1), 1, GPIO_OUT_LOW) +GPIO(PP1800_DX_AUDIO_EN, PORT(16), 0, GPIO_OUT_LOW) +GPIO(PCH_RTCRST, PORT(16), 3, GPIO_OUT_LOW) +/* From lid sensor */ +GPIO(TABLET_MODE, PORT(20), 1, GPIO_INPUT) +GPIO(ENABLE_BACKLIGHT, PORT(20), 2, GPIO_OUT_HIGH) +GPIO(PP3300_WLAN_EN, PORT(20), 3, GPIO_OUT_LOW) +GPIO(EC_WAKE_CLK, PORT(21), 0, GPIO_INPUT) +GPIO(BOARD_ID0, PORT(0), 6, GPIO_INPUT) +GPIO(BOARD_ID1, PORT(0), 7, GPIO_INPUT) +GPIO(BOARD_ID2, PORT(1), 0, GPIO_INPUT) +GPIO(KBD_KSO2, PORT(10), 1, GPIO_OUT_LOW) +GPIO(PVT_CS0, PORT(14), 6, GPIO_ODR_HIGH) +GPIO(SYS_RESET_L, PORT(12), 1, GPIO_ODR_HIGH) + +/* Alternate functions GPIO definitions */ + +/* GPIO162(UART_RX), GPIO165(UART_TX) */ +ALTERNATE(PORT(16), 0x24, 1, MODULE_UART, 0) + +/* KB pins */ +/* KB ROW - GPIO000-GPIO005 */ +ALTERNATE(PORT(0), 0x3f, 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) +/* KB ROW - GPIO100-GPIO104, GPIO106-GPIO107 */ +ALTERNATE(PORT(10), 0xdf, 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) +/* KB COL - GPIO032 */ +ALTERNATE(PORT(3), 0x04, 3, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) +/* KB COL - GPIO040, GPIO42-GPIO43 */ +ALTERNATE(PORT(4), 0x0d, 3, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) +/* KB COL - GPIO125-GPIO126 */ +ALTERNATE(PORT(12), 0x60, 2, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) +/* KB COL - GPIO142, GPIO144 */ +ALTERNATE(PORT(14), 0x14, 3, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) + +/* LPC pins */ +/* LPC_CLK_RUN_L - GPIO014 */ +ALTERNATE(PORT(1), 0x10, 1, MODULE_LPC, 0) +/* LAD[0:3] - GPIO111-GPIO114, SERIRQ - GPIO115, PCI_CLK - GPIO117 */ +ALTERNATE(PORT(11), 0xbe, 1, MODULE_LPC, 0) +/* LRESET# - GPIO116 */ +ALTERNATE(PORT(11), 0x40, 1, MODULE_LPC, GPIO_INT_BOTH) +/* LFRAME# - GPIO120 */ +ALTERNATE(PORT(12), 0x01, 1, MODULE_LPC, 0) + +/* SPI pins */ +/* MOSI - GPIO054 */ +ALTERNATE(PORT(5), 0x10, 1, MODULE_SPI, 0) +/* PVT_CS0# - GPIO146 */ +ALTERNATE(PORT(14), 0x40, 1, MODULE_SPI, 0) +/* MISO - GPIO164 */ +ALTERNATE(PORT(16), 0x10, 1, MODULE_SPI, 0) +/* PVT_SCLK - GPIO153 */ +ALTERNATE(PORT(15), 0x08, 1, MODULE_SPI, 0) +/* SHD_CS0# - GPIO150. Shared SPI chip select */ +ALTERNATE(PORT(15), 0x00, 1, MODULE_SPI, 0) + +/* I2C pins */ +/* I2C0_0 CLK - GPIO015, I2C0_0 DAT - GPIO016, I2C0_1 DAT - GPIO017 */ +ALTERNATE(PORT(1), 0xe0, 2, MODULE_I2C, GPIO_ODR_HIGH) +/* I2C{1,2,3} CLK / DAT - GPIO020-GPIO025*/ +ALTERNATE(PORT(2), 0x3f, 2, MODULE_I2C, GPIO_ODR_HIGH) +/* I2C0_1 CLK - GPIO134 */ +ALTERNATE(PORT(13), 0x10, 2, MODULE_I2C, GPIO_ODR_HIGH) + +/* ADC pins */ +/* ADC0 - GPIO056 / EC_BATT_TMP. ADC1 - GPIO057 / PPVAR_BOOSTIN_SENSE */ +ALTERNATE(PORT(5), 0xc0, 1, MODULE_ADC, GPIO_ANALOG) +/* ADC3 - GPIO061 / IADP_ACMON_BMON. ADC4 - GPIO062 / PMON_PSYS */ +ALTERNATE(PORT(6), 0x06, 1, MODULE_ADC, GPIO_ANALOG) + +/* LED1 - GPIO155. LED2 - GPIO156 */ +ALTERNATE(PORT(15), 0x60, 2, MODULE_POWER_LED, 0) + +/* VCC1_RST# - GPIO131 */ +ALTERNATE(PORT(13), 0x02, 1, MODULE_PMU, 0) +/* nRESET_OUT - GPIO121 */ +ALTERNATE(PORT(12), 0x02, 1, MODULE_PMU, 0) |