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authorBill Richardson <wfrichar@chromium.org>2016-04-15 16:40:38 -0700
committerchrome-bot <chrome-bot@chromium.org>2016-04-16 12:00:21 -0700
commit096dec1adba5928fdff6c0d0b47d51545580a268 (patch)
tree2f2f8dad84956d6e536fd08e8e10529ea9b6c4a9 /board/glados
parente4690f61524e4fc45fcec7ef8fb43cd0f6ccc373 (diff)
downloadchrome-ec-096dec1adba5928fdff6c0d0b47d51545580a268.tar.gz
Cr50: Change SYS_RST output to SYS_RST_L inout
This signal should be active low, not active high. In addition, not only can we pull it low but so can other components. If something else asserts it, we need to react. This changes the polarity and sets up the interrupt handler. A future CL will be needed to make the handler do something useful. BUG=chrome-os-partner:52366 BRANCH=none TEST=make buildall; test on Cr50 On the test board, short M0 to ground to trigger the interrupt. Watch the input value with gpioget You can drive the output (and trigger the interrupt) with gpioset SYS_RST_L_OUT 0 gpioset SYS_RST_L_OUT 1 Change-Id: I3556963859601f43f990fc83f26d2cea919383c6 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/339214 Reviewed-by: Shawn N <shawnn@chromium.org>
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