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authorAlec Berg <alecaberg@chromium.org>2015-05-25 11:35:21 -0700
committerChromeOS Commit Bot <chromeos-commit-bot@chromium.org>2015-06-01 23:47:04 +0000
commit2b56419578e9780b99a9bb371d665958a7edca65 (patch)
tree6abc7f9a962f404d368ebd3985b07ce3085e4c55 /board/glados_pd/board.c
parentf58eff670034fe460c6082f964598ef47ffddde2 (diff)
downloadchrome-ec-2b56419578e9780b99a9bb371d665958a7edca65.tar.gz
glados_pd: add initial support for glados PD
Initial support for glados PD. Charging and PD communication only work on port 0. BUG=none BRANCH=none TEST=make BOARD=glados, make BOARD=glados_pd Connect hoho to glados and verify power contract successful. Connect zinger to glados and verify power contract and charging. Change-Id: I42e7b8d154a79de2f8502648d9af7d4cfc00a266 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/273138 Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'board/glados_pd/board.c')
-rw-r--r--board/glados_pd/board.c105
1 files changed, 105 insertions, 0 deletions
diff --git a/board/glados_pd/board.c b/board/glados_pd/board.c
new file mode 100644
index 0000000000..38853f86db
--- /dev/null
+++ b/board/glados_pd/board.c
@@ -0,0 +1,105 @@
+/* Copyright 2015 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* glados_pd board configuration */
+
+#include "adc.h"
+#include "adc_chip.h"
+#include "common.h"
+#include "console.h"
+#include "gpio.h"
+#include "hooks.h"
+#include "host_command.h"
+#include "i2c.h"
+#include "registers.h"
+#include "system.h"
+#include "task.h"
+#include "usb_pd.h"
+#include "util.h"
+
+#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args)
+
+void pd_send_ec_int(void)
+{
+ gpio_set_level(GPIO_EC_INT, 0);
+
+ /*
+ * Delay long enough to guarantee EC see's the change.
+ * TODO: make sure this delay is sufficient.
+ */
+ usleep(5);
+
+ gpio_set_level(GPIO_EC_INT, 1);
+}
+
+void vbus0_evt(enum gpio_signal signal)
+{
+ task_wake(TASK_ID_PD);
+}
+
+void vbus1_evt(enum gpio_signal signal)
+{
+#ifdef HAS_TASK_PD_C1
+ task_wake(TASK_ID_PD_C1);
+#endif
+}
+
+void board_config_pre_init(void)
+{
+ /* enable SYSCFG clock */
+ STM32_RCC_APB2ENR |= 1 << 0;
+ /*
+ * the DMA mapping is :
+ * Chan 2 : TIM1_CH1 (C0 RX)
+ * Chan 3 : SPI1_TX (C0 TX)
+ * Chan 4 : TIM3_CH1 (C1 RX)
+ * Chan 5 : SPI2_TX (C1 TX)
+ */
+}
+
+#include "gpio_list.h"
+
+/* Initialize board. */
+static void board_init(void)
+{
+ /* Enable interrupts on VBUS transitions. */
+ gpio_enable_interrupt(GPIO_USB_C0_VBUS_WAKE_L);
+ gpio_enable_interrupt(GPIO_USB_C1_VBUS_WAKE_L);
+}
+DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
+
+/* ADC channels */
+const struct adc_t adc_channels[] = {
+ /* USB PD CC lines sensing. Converted to mV (3300mV/4096). */
+ [ADC_C1_CC1_PD] = {"C1_CC1_PD", 3300, 4096, 0, STM32_AIN(0)},
+ [ADC_C0_CC1_PD] = {"C0_CC1_PD", 3300, 4096, 0, STM32_AIN(2)},
+ [ADC_C0_CC2_PD] = {"C0_CC2_PD", 3300, 4096, 0, STM32_AIN(4)},
+ [ADC_C1_CC2_PD] = {"C1_CC2_PD", 3300, 4096, 0, STM32_AIN(5)},
+};
+BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
+
+/* I2C ports */
+const struct i2c_port_t i2c_ports[] = {
+ {"slave", I2C_PORT_SLAVE, 1000, GPIO_SLAVE_I2C_SCL, GPIO_SLAVE_I2C_SDA}
+};
+const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
+
+void tcpc_alert(void)
+{
+ pd_send_ec_int();
+}
+
+/****************************************************************************/
+/* Console commands */
+static int command_ec_int(int argc, char **argv)
+{
+ pd_send_ec_int();
+
+ return EC_SUCCESS;
+}
+DECLARE_CONSOLE_COMMAND(ecint, command_ec_int,
+ "",
+ "Toggle EC interrupt line",
+ NULL);