diff options
author | Vijay Hiremath <vijay.p.hiremath@intel.com> | 2017-04-19 18:48:20 -0700 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2017-08-21 22:03:53 -0700 |
commit | 309289df45c35af0e935b1a965412e4dacaad036 (patch) | |
tree | c8858e821efda852f8344a0f70b001fb4e735840 /board/glkrvp | |
parent | e11682bc0143691c72cc3e08ff781587a954ea32 (diff) | |
download | chrome-ec-309289df45c35af0e935b1a965412e4dacaad036.tar.gz |
glkrvp: Enable TCPC using NXP PTN5110 AIC
BUG=b:64531818
BRANCH=glkrvp
TEST=TCPC can negotiate to 20V & 2.25A
Change-Id: I16510a510133bbb1827634303a6b9d02dec4bbc6
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/614311
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'board/glkrvp')
-rw-r--r-- | board/glkrvp/board.c | 2 | ||||
-rw-r--r-- | board/glkrvp/board.h | 27 | ||||
-rw-r--r-- | board/glkrvp/build.mk | 1 | ||||
-rw-r--r-- | board/glkrvp/chg_usb_pd.c | 166 | ||||
-rw-r--r-- | board/glkrvp/ec.tasklist | 5 | ||||
-rw-r--r-- | board/glkrvp/gpio.inc | 10 | ||||
-rw-r--r-- | board/glkrvp/usb_pd_policy.c | 375 |
7 files changed, 581 insertions, 5 deletions
diff --git a/board/glkrvp/board.c b/board/glkrvp/board.c index b9dbd1f09a..7170c47d0f 100644 --- a/board/glkrvp/board.c +++ b/board/glkrvp/board.c @@ -56,7 +56,7 @@ BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT); /* I2C ports */ const struct i2c_port_t i2c_ports[] = { {"pmic", NPCX_I2C_PORT0_0, 100, GPIO_I2C0_SCL0, GPIO_I2C0_SDA0}, - {"master0-1", NPCX_I2C_PORT0_1, 400, GPIO_I2C0_SCL1, GPIO_I2C0_SDA1}, + {"typec", NPCX_I2C_PORT0_1, 400, GPIO_I2C0_SCL1, GPIO_I2C0_SDA1}, {"master1", NPCX_I2C_PORT1, 400, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, {"master2", NPCX_I2C_PORT2, 100, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, {"charger", NPCX_I2C_PORT3, 100, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, diff --git a/board/glkrvp/board.h b/board/glkrvp/board.h index fb6c312d68..9cee863bd8 100644 --- a/board/glkrvp/board.h +++ b/board/glkrvp/board.h @@ -31,8 +31,9 @@ #define CONFIG_BATTERY_SMART /* Charger */ +#define CONFIG_CHARGE_MANAGER #define CONFIG_CHARGER -#define CONFIG_CHARGER_INPUT_CURRENT 2250 +#define CONFIG_CHARGER_INPUT_CURRENT 512 #define CONFIG_CHARGER_ISL9238 #define CONFIG_CHARGER_NARROW_VDC #define CONFIG_CHARGER_PROFILE_OVERRIDE @@ -55,6 +56,15 @@ /* USB-A config */ /* USB PD config */ +#define CONFIG_USB_CHARGER +#define CONFIG_USB_PD_DUAL_ROLE +#define CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT TYPEC_RP_3A0 +#define CONFIG_USB_PD_PORT_COUNT 2 +#define CONFIG_USB_PD_QUIRK_SLOW_CC_STATUS +#define CONFIG_USB_PD_TCPM_TCPCI +#define CONFIG_USB_PD_TRY_SRC +#define CONFIG_USB_PD_VBUS_DETECT_TCPC +#define CONFIG_USB_POWER_DELIVERY /* SoC / PCH */ #define CONFIG_LPC @@ -120,12 +130,27 @@ enum power_signal { }; enum adc_channel { + ADC_VBUS, ADC_CH_COUNT, }; int board_get_version(void); +/* TODO: Verify the numbers below. */ +#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ +#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ + /* Define typical operating power and max power */ +#define PD_OPERATING_POWER_MW 15000 +#define PD_MAX_POWER_MW 45000 +#define PD_MAX_CURRENT_MA 3000 +#define PD_MAX_VOLTAGE_MV 20000 + +/* Reset PD MCU */ +void board_reset_pd_mcu(void); +void tcpc_alert_event(enum gpio_signal signal); +void board_charging_enable(int port, int enable); +void board_vbus_enable(int port, int enable); #endif /* !__ASSEMBLER__ */ diff --git a/board/glkrvp/build.mk b/board/glkrvp/build.mk index f5f36c5045..d1a8fc77b1 100644 --- a/board/glkrvp/build.mk +++ b/board/glkrvp/build.mk @@ -11,3 +11,4 @@ CHIP_VARIANT:=npcx5m6g board-y=board.o board-$(CONFIG_BATTERY_SMART)+=battery.o +board-$(CONFIG_USB_POWER_DELIVERY)+=chg_usb_pd.o usb_pd_policy.o diff --git a/board/glkrvp/chg_usb_pd.c b/board/glkrvp/chg_usb_pd.c new file mode 100644 index 0000000000..fd972fd76b --- /dev/null +++ b/board/glkrvp/chg_usb_pd.c @@ -0,0 +1,166 @@ +/* Copyright 2017 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "charge_manager.h" +#include "charge_state_v2.h" +#include "console.h" +#include "hooks.h" +#include "task.h" +#include "tcpci.h" +#include "system.h" +#include "util.h" + +#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) +#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) + +#define PTN5110_EXT_GPIO_CONFIG 0x92 +#define PTN5110_EXT_GPIO_CONTROL 0x93 + +#define PTN5110_EXT_GPIO_FRS_EN (1 << 6) +#define PTN5110_EXT_GPIO_EN_SRC (1 << 5) +#define PTN5110_EXT_GPIO_EN_SNK1 (1 << 4) +#define PTN5110_EXT_GPIO_IILIM_5V_VBUS_L (1 << 3) + +const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_COUNT] = { + {NPCX_I2C_PORT0_1, 0xA0, &tcpci_tcpm_drv, TCPC_ALERT_ACTIVE_LOW}, + {NPCX_I2C_PORT0_1, 0xA4, &tcpci_tcpm_drv, TCPC_ALERT_ACTIVE_LOW}, +}; +BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == CONFIG_USB_PD_PORT_COUNT); + +static int board_charger_port_is_sourcing_vbus(int port) +{ + int reg; + + if (tcpc_read(port, PTN5110_EXT_GPIO_CONTROL, ®)) + return 0; + + return !!(reg & PTN5110_EXT_GPIO_EN_SRC); +} + +static int ptn5110_ext_gpio_enable(int port, int enable, int gpio) +{ + int reg; + int rv; + + rv = tcpc_read(port, PTN5110_EXT_GPIO_CONTROL, ®); + if (rv) + return rv; + + if (enable) + reg |= gpio; + else + reg &= ~gpio; + + return tcpc_write(port, PTN5110_EXT_GPIO_CONTROL, reg); +} + +void board_charging_enable(int port, int enable) +{ + ptn5110_ext_gpio_enable(port, enable, PTN5110_EXT_GPIO_EN_SNK1); +} + +void board_vbus_enable(int port, int enable) +{ + ptn5110_ext_gpio_enable(port, enable, PTN5110_EXT_GPIO_EN_SRC); +} + +void tcpc_alert_event(enum gpio_signal signal) +{ +#ifdef HAS_TASK_PDCMD + /* Exchange status with TCPCs */ + host_command_pd_send_status(PD_CHARGE_NO_CHANGE); +#endif +} + +void board_tcpc_init(void) +{ + /* Only reset TCPC if not sysjump */ + if (!system_jumped_to_this_image()) + board_reset_pd_mcu(); + + /* Enable TCPC0/1 interrupt */ + gpio_enable_interrupt(GPIO_USB_C0_PD_INT_ODL); + gpio_enable_interrupt(GPIO_USB_C1_PD_INT_ODL); +} +DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C + 1); + +int board_tcpc_post_init(int port) +{ + int reg; + int rv; + + rv = tcpc_read(port, PTN5110_EXT_GPIO_CONFIG, ®); + if (rv) + return rv; + + /* Configure PTN5110 External GPIOs as output */ + reg |= PTN5110_EXT_GPIO_EN_SRC | PTN5110_EXT_GPIO_EN_SNK1 | + PTN5110_EXT_GPIO_IILIM_5V_VBUS_L; + rv = tcpc_write(port, PTN5110_EXT_GPIO_CONFIG, reg); + if (rv) + return rv; + + return ptn5110_ext_gpio_enable(port, 1, + PTN5110_EXT_GPIO_IILIM_5V_VBUS_L); +} + +/* Reset PD MCU */ +void board_reset_pd_mcu(void) +{ + /* TODO: Add reset logic */ +} + +int board_set_active_charge_port(int port) +{ + /* charge port is a realy physical port */ + int is_real_port = (port >= 0 && + port < CONFIG_USB_PD_PORT_COUNT); + /* check if we are source vbus on that port */ + int source = board_charger_port_is_sourcing_vbus(port); + + if (is_real_port && source) { + CPRINTS("Skip enable p%d", port); + return EC_ERROR_INVAL; + } + + CPRINTS("New chg p%d", port); + + if (port != CHARGE_PORT_NONE) { + /* Make sure non-charging port is disabled */ + board_charging_enable(port, 1); + board_charging_enable(!port, 0); + } else { + /* Disable both ports */ + board_charging_enable(0, 0); + board_charging_enable(1, 0); + } + + return EC_SUCCESS; +} + +uint16_t tcpc_get_alert_status(void) +{ + uint16_t status = 0; + + if (!gpio_get_level(GPIO_USB_C0_PD_INT_ODL)) + status |= PD_STATUS_TCPC_ALERT_0; + + if (!gpio_get_level(GPIO_USB_C1_PD_INT_ODL)) + status |= PD_STATUS_TCPC_ALERT_1; + + return status; +} + +void board_set_charge_limit(int port, int supplier, int charge_ma, + int max_ma, int charge_mv) +{ + charge_set_input_current_limit(MAX(charge_ma, + CONFIG_CHARGER_INPUT_CURRENT), charge_mv); +} + +int adc_read_channel(enum adc_channel ch) +{ + return 0; +} diff --git a/board/glkrvp/ec.tasklist b/board/glkrvp/ec.tasklist index e7425d0142..93013828f1 100644 --- a/board/glkrvp/ec.tasklist +++ b/board/glkrvp/ec.tasklist @@ -28,7 +28,10 @@ TASK_ALWAYS(CHARGER, charger_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ + TASK_NOTEST(PDCMD, pd_command_task, NULL, TASK_STACK_SIZE) \ TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \ TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) \ TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) + TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C0, pd_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C1, pd_task, NULL, LARGER_TASK_STACK_SIZE) diff --git a/board/glkrvp/gpio.inc b/board/glkrvp/gpio.inc index 55866ae257..475fa238bd 100644 --- a/board/glkrvp/gpio.inc +++ b/board/glkrvp/gpio.inc @@ -20,6 +20,8 @@ GPIO_INT(POWER_BUTTON_L, PIN(A, 6), GPIO_INT_BOTH, power_button_interrupt) /* ME GPIO_INT(LID_OPEN, PIN(0, 3), GPIO_INT_BOTH | GPIO_PULL_UP, lid_interrupt) /* SMC_LID */ GPIO_INT(AC_PRESENT, PIN(D, 2), GPIO_INT_BOTH, extpower_interrupt) /* ACOK_OD from ISL9238 */ GPIO_INT(WP_L, PIN(9, 3), GPIO_INT_BOTH | GPIO_SEL_1P8V, switch_interrupt) /* EC_WP_ODL */ +GPIO_INT(USB_C0_PD_INT_ODL, PIN(6, 2), GPIO_INT_FALLING, tcpc_alert_event) +GPIO_INT(USB_C1_PD_INT_ODL, PIN(6, 3), GPIO_INT_FALLING, tcpc_alert_event) GPIO(PCH_SMI_L, PIN(C, 6), GPIO_ODR_HIGH) /* EC_SMI_ODL */ GPIO(PCH_SCI_L, PIN(7, 6), GPIO_ODR_HIGH) /* EC_SCI_ODL */ @@ -56,6 +58,10 @@ GPIO(I2C2_SDA, PIN(9, 1), GPIO_ODR_HIGH) GPIO(I2C3_SCL, PIN(D, 1), GPIO_ODR_HIGH) GPIO(I2C3_SDA, PIN(D, 0), GPIO_ODR_HIGH) +/* Type-C control GPIOs */ +UNIMPLEMENTED(USB_C0_5V_EN) +UNIMPLEMENTED(USB_C1_5V_EN) + /* Unused pins 3.3V & Interruptable */ GPIO(NC_02, PIN(0, 2), GPIO_INPUT) GPIO(NC_04, PIN(0, 4), GPIO_INPUT) @@ -67,8 +73,8 @@ GPIO(NC_41, PIN(4, 1), GPIO_INPUT) GPIO(NC_42, PIN(4, 2), GPIO_INPUT) GPIO(NC_60, PIN(6, 0), GPIO_INPUT) -GPIO(NC_62, PIN(6, 2), GPIO_INPUT) -GPIO(NC_63, PIN(6, 3), GPIO_INPUT) +GPIO(NC_61, PIN(6, 1), GPIO_INPUT) +GPIO(NC_67, PIN(6, 7), GPIO_INPUT) GPIO(NC_71, PIN(7, 1), GPIO_INPUT) GPIO(NC_73, PIN(7, 3), GPIO_INPUT) diff --git a/board/glkrvp/usb_pd_policy.c b/board/glkrvp/usb_pd_policy.c new file mode 100644 index 0000000000..fe66a7a5cc --- /dev/null +++ b/board/glkrvp/usb_pd_policy.c @@ -0,0 +1,375 @@ +/* Copyright 2017 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "charge_manager.h" +#include "compile_time_macros.h" +#include "console.h" +#include "gpio.h" +#include "stddef.h" +#include "system.h" +#include "usb_mux.h" +#include "usb_pd_tcpm.h" + +#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) +#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) + +#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\ + PDO_FIXED_COMM_CAP) + +/* TODO: fill in correct source and sink capabilities */ +const uint32_t pd_src_pdo[] = { + PDO_FIXED(5000, 1500, PDO_FIXED_FLAGS), +}; +const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); +const uint32_t pd_src_pdo_max[] = { + PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS), +}; +const int pd_src_pdo_max_cnt = ARRAY_SIZE(pd_src_pdo_max); + +const uint32_t pd_snk_pdo[] = { + PDO_FIXED(5000, 500, PDO_FIXED_FLAGS), + PDO_BATT(4750, 21000, 15000), + PDO_VAR(4750, 21000, 3000), +}; +const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); + +int pd_is_valid_input_voltage(int mv) +{ + return 1; +} + +void pd_transition_voltage(int idx) +{ + /* No-operation: we are always 5V */ +} + +int pd_set_power_supply_ready(int port) +{ + /* Disable charging */ + board_charging_enable(port, 0); + + /* Provide VBUS */ + board_vbus_enable(port, 1); + + /* notify host of power info change */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); + + return EC_SUCCESS; /* we are ready */ +} + +void pd_power_supply_reset(int port) +{ + /* Disable VBUS */ + board_vbus_enable(port, 0); + + /* notify host of power info change */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); +} + +void pd_set_input_current_limit(int port, uint32_t max_ma, + uint32_t supply_voltage) +{ +#ifdef CONFIG_CHARGE_MANAGER + struct charge_port_info charge; + + charge.current = max_ma; + charge.voltage = supply_voltage; + charge_manager_update_charge(CHARGE_SUPPLIER_PD, port, &charge); +#endif +} + +void typec_set_input_current_limit(int port, uint32_t max_ma, + uint32_t supply_voltage) +{ +#ifdef CONFIG_CHARGE_MANAGER + struct charge_port_info charge; + + charge.current = max_ma; + charge.voltage = supply_voltage; + charge_manager_update_charge(CHARGE_SUPPLIER_TYPEC, port, &charge); +#endif +} + +int pd_board_checks(void) +{ + return EC_SUCCESS; +} + +int pd_check_power_swap(int port) +{ + /* + * Allow power swap as long as we are acting as a dual role device, + * otherwise assume our role is fixed (not in S0 or console command + * to fix our role). + */ + return pd_get_dual_role() == PD_DRP_TOGGLE_ON; +} + +int pd_check_data_swap(int port, int data_role) +{ + /* Allow data swap if we are a UFP, otherwise don't allow */ + return (data_role == PD_ROLE_UFP); +} + +int pd_check_vconn_swap(int port) +{ + /* in G3, do not allow vconn swap since pp5000_A rail is off */ + /* TODO: return gpio_get_level(GPIO_PMIC_EN); */ + return 1; +} + +void pd_execute_data_swap(int port, int data_role) +{ + /* Do nothing */ +} + +void pd_check_pr_role(int port, int pr_role, int flags) +{ + /* + * If partner is dual-role power and dualrole toggling is on, consider + * if a power swap is necessary. + */ + if ((flags & PD_FLAGS_PARTNER_DR_POWER) && + pd_get_dual_role() == PD_DRP_TOGGLE_ON) { + /* + * If we are a sink and partner is not externally powered, then + * swap to become a source. If we are source and partner is + * externally powered, swap to become a sink. + */ + int partner_extpower = flags & PD_FLAGS_PARTNER_EXTPOWER; + + if ((!partner_extpower && pr_role == PD_ROLE_SINK) || + (partner_extpower && pr_role == PD_ROLE_SOURCE)) + pd_request_power_swap(port); + } +} + +void pd_check_dr_role(int port, int dr_role, int flags) +{ + /* If UFP, try to switch to DFP */ + if ((flags & PD_FLAGS_PARTNER_DR_DATA) && dr_role == PD_ROLE_UFP) + pd_request_data_swap(port); +} + +/* ----------------- Vendor Defined Messages ------------------ */ +const struct svdm_response svdm_rsp = { + .identity = NULL, + .svids = NULL, + .modes = NULL, +}; + +int pd_custom_vdm(int port, int cnt, uint32_t *payload, + uint32_t **rpayload) +{ + int cmd = PD_VDO_CMD(payload[0]); + uint16_t dev_id = 0; + int is_rw, is_latest; + + /* make sure we have some payload */ + if (cnt == 0) + return 0; + + switch (cmd) { + case VDO_CMD_VERSION: + /* guarantee last byte of payload is null character */ + *(payload + cnt - 1) = 0; + CPRINTF("version: %s\n", (char *)(payload+1)); + break; + case VDO_CMD_READ_INFO: + case VDO_CMD_SEND_INFO: + /* copy hash */ + if (cnt == 7) { + dev_id = VDO_INFO_HW_DEV_ID(payload[6]); + is_rw = VDO_INFO_IS_RW(payload[6]); + + is_latest = pd_dev_store_rw_hash(port, + dev_id, + payload + 1, + is_rw ? + SYSTEM_IMAGE_RW : + SYSTEM_IMAGE_RO); + + /* + * Send update host event unless our RW hash is + * already known to be the latest update RW. + */ + if (!is_rw || !is_latest) + pd_send_host_event(PD_EVENT_UPDATE_DEVICE); + + CPRINTF("DevId:%d.%d SW:%d RW:%d\n", + HW_DEV_ID_MAJ(dev_id), + HW_DEV_ID_MIN(dev_id), + VDO_INFO_SW_DBG_VER(payload[6]), + is_rw); + } else if (cnt == 6) { + /* really old devices don't have last byte */ + pd_dev_store_rw_hash(port, dev_id, payload + 1, + SYSTEM_IMAGE_UNKNOWN); + } + break; + case VDO_CMD_CURRENT: + CPRINTF("Current: %dmA\n", payload[1]); + break; + case VDO_CMD_FLIP: + /* TODO: usb_mux_flip(port); */ + break; +#ifdef CONFIG_USB_PD_LOGGING + case VDO_CMD_GET_LOG: + pd_log_recv_vdm(port, cnt, payload); + break; +#endif /* CONFIG_USB_PD_LOGGING */ + } + + return 0; +} + +#ifdef CONFIG_USB_PD_ALT_MODE_DFP +static int dp_flags[CONFIG_USB_PD_PORT_COUNT]; +static uint32_t dp_status[CONFIG_USB_PD_PORT_COUNT]; + +static void svdm_safe_dp_mode(int port) +{ + /* make DP interface safe until configure */ + dp_flags[port] = 0; + dp_status[port] = 0; + usb_mux_set(port, TYPEC_MUX_NONE, + USB_SWITCH_CONNECT, pd_get_polarity(port)); +} + +static int svdm_enter_dp_mode(int port, uint32_t mode_caps) +{ + /* Only enter mode if device is DFP_D capable */ + if (mode_caps & MODE_DP_SNK) { + svdm_safe_dp_mode(port); + return 0; + } + + return -1; +} + +static int svdm_dp_status(int port, uint32_t *payload) +{ + int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT); + + payload[0] = VDO(USB_SID_DISPLAYPORT, 1, + CMD_DP_STATUS | VDO_OPOS(opos)); + payload[1] = VDO_DP_STATUS(0, /* HPD IRQ ... not applicable */ + 0, /* HPD level ... not applicable */ + 0, /* exit DP? ... no */ + 0, /* usb mode? ... no */ + 0, /* multi-function ... no */ + (!!(dp_flags[port] & DP_FLAGS_DP_ON)), + 0, /* power low? ... no */ + (!!(dp_flags[port] & DP_FLAGS_DP_ON))); + return 2; +}; + +static int svdm_dp_config(int port, uint32_t *payload) +{ + int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT); + int mf_pref = PD_VDO_DPSTS_MF_PREF(dp_status[port]); + int pin_mode = pd_dfp_dp_get_pin_mode(port, dp_status[port]); + + if (!pin_mode) + return 0; + + usb_mux_set(port, mf_pref ? TYPEC_MUX_DOCK : TYPEC_MUX_DP, + USB_SWITCH_CONNECT, pd_get_polarity(port)); + + payload[0] = VDO(USB_SID_DISPLAYPORT, 1, + CMD_DP_CONFIG | VDO_OPOS(opos)); + payload[1] = VDO_DP_CFG(pin_mode, /* pin mode */ + 1, /* DPv1.3 signaling */ + 2); /* UFP connected */ + return 2; +}; + +static void svdm_dp_post_config(int port) +{ + const struct usb_mux *mux = &usb_muxes[port]; + + dp_flags[port] |= DP_FLAGS_DP_ON; + if (!(dp_flags[port] & DP_FLAGS_HPD_HI_PENDING)) + return; + mux->hpd_update(port, 1, 0); +} + +static int svdm_dp_attention(int port, uint32_t *payload) +{ + int lvl = PD_VDO_DPSTS_HPD_LVL(payload[1]); + int irq = PD_VDO_DPSTS_HPD_IRQ(payload[1]); + const struct usb_mux *mux = &usb_muxes[port]; + + dp_status[port] = payload[1]; + if (!(dp_flags[port] & DP_FLAGS_DP_ON)) { + if (lvl) + dp_flags[port] |= DP_FLAGS_HPD_HI_PENDING; + return 1; + } + mux->hpd_update(port, lvl, irq); + + /* ack */ + return 1; +} + +static void svdm_exit_dp_mode(int port) +{ + const struct usb_mux *mux = &usb_muxes[port]; + + svdm_safe_dp_mode(port); + mux->hpd_update(port, 0, 0); +} + +static int svdm_enter_gfu_mode(int port, uint32_t mode_caps) +{ + /* Always enter GFU mode */ + return 0; +} + +static void svdm_exit_gfu_mode(int port) +{ +} + +static int svdm_gfu_status(int port, uint32_t *payload) +{ + /* + * This is called after enter mode is successful, send unstructured + * VDM to read info. + */ + pd_send_vdm(port, USB_VID_GOOGLE, VDO_CMD_READ_INFO, NULL, 0); + return 0; +} + +static int svdm_gfu_config(int port, uint32_t *payload) +{ + return 0; +} + +static int svdm_gfu_attention(int port, uint32_t *payload) +{ + return 0; +} + +const struct svdm_amode_fx supported_modes[] = { + { + .svid = USB_SID_DISPLAYPORT, + .enter = &svdm_enter_dp_mode, + .status = &svdm_dp_status, + .config = &svdm_dp_config, + .post_config = &svdm_dp_post_config, + .attention = &svdm_dp_attention, + .exit = &svdm_exit_dp_mode, + }, + { + .svid = USB_VID_GOOGLE, + .enter = &svdm_enter_gfu_mode, + .status = &svdm_gfu_status, + .config = &svdm_gfu_config, + .attention = &svdm_gfu_attention, + .exit = &svdm_exit_gfu_mode, + } +}; +const int supported_modes_cnt = ARRAY_SIZE(supported_modes); +#endif /* CONFIG_USB_PD_ALT_MODE_DFP */ |