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author | Furquan Shaikh <furquan@google.com> | 2018-04-18 18:55:30 -0700 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2018-04-19 19:28:42 -0700 |
commit | 8faa22cb27bd9cbee39b810e6a3d48593ba96242 (patch) | |
tree | ef9beb2922947907d7e63e44f5990248038f5f62 /board/glkrvp | |
parent | e54c3e1728cc4648e2c489770bcad678e985b129 (diff) | |
download | chrome-ec-8faa22cb27bd9cbee39b810e6a3d48593ba96242.tar.gz |
APL/GLK boards: Use chipset_pre_init_callback
This change updates all APL/GLK boards to use
chipset_pre_init_callback instead of hook.
BUG=b:78259506
BRANCH=None
TEST=Verified that yorp still boots.
Change-Id: I71ab0f1111e89a254db83fc58abfdfe8eacd3575
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1018734
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'board/glkrvp')
-rw-r--r-- | board/glkrvp/board.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/board/glkrvp/board.c b/board/glkrvp/board.c index 02046de236..898c53971c 100644 --- a/board/glkrvp/board.c +++ b/board/glkrvp/board.c @@ -77,7 +77,7 @@ const enum gpio_signal hibernate_wake_pins[] = { const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); /* Called by APL power state machine when transitioning from G3 to S5 */ -static void chipset_pre_init(void) +void chipset_pre_init_callback(void) { int data; @@ -102,8 +102,6 @@ static void chipset_pre_init(void) /* Enable PMIC_EN: Set the Output port O0.0 to high level */ PCA555_PMIC_GPIO_WRITE(PCA9555_CMD_OUTPUT_PORT_0, data | PCA9555_IO_0); } -DECLARE_HOOK(HOOK_CHIPSET_PRE_INIT, chipset_pre_init, HOOK_PRIO_DEFAULT); - /* Initialize board. */ static void board_init(void) |