diff options
| author | Denis Brockus <dbrockus@chromium.org> | 2019-07-16 15:10:11 -0600 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2019-07-20 23:09:18 +0000 |
| commit | 473bd883b60fd5b00377766dae2bacad246de0d2 (patch) | |
| tree | 992d9f03104277934c22c869eceb634e2cf5f7ec /board/glkrvp_ite/board.c | |
| parent | 053491b560d2c4e374bb739373d8ae25c41f6315 (diff) | |
| download | chrome-ec-473bd883b60fd5b00377766dae2bacad246de0d2.tar.gz | |
Remove __7b, __8b and __7bf
The extentions were added to make the compiler perform most
of the verification that the conversion was being done correctly
to remove 8bit addressing as the standard I2C/SPI address type.
Now that the compiler has verified the code, the extra
extentions are being removed
BUG=chromium:971296
BRANCH=none
TEST=make buildall -j
TEST=verify sensor functionality on arcada_ish
Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Diffstat (limited to 'board/glkrvp_ite/board.c')
| -rw-r--r-- | board/glkrvp_ite/board.c | 44 |
1 files changed, 22 insertions, 22 deletions
diff --git a/board/glkrvp_ite/board.c b/board/glkrvp_ite/board.c index 9721549b14..33d98477bf 100644 --- a/board/glkrvp_ite/board.c +++ b/board/glkrvp_ite/board.c @@ -31,7 +31,7 @@ #include "gpio_list.h" #define I2C_PORT_PCA555_BOARD_ID_GPIO IT83XX_I2C_CH_C -#define I2C_ADDR_PCA555_BOARD_ID_GPIO__7bf 0x20 +#define I2C_ADDR_PCA555_BOARD_ID_GPIO_FLAGS 0x20 /* I2C ports */ const struct i2c_port_t i2c_ports[] = { @@ -55,8 +55,8 @@ void chipset_pre_init_callback(void) { int data; - if (pca9555_read__7bf(I2C_PORT_PCA555_PMIC_BATT_GPIO, - I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf, + if (pca9555_read(I2C_PORT_PCA555_PMIC_BATT_GPIO, + I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS, PCA9555_CMD_OUTPUT_PORT_0, &data)) return; @@ -70,16 +70,16 @@ void chipset_pre_init_callback(void) /* Enable SOC_3P3_EN_L: Set the Output port O0.1 to low level */ data &= ~PCA9555_IO_1; - pca9555_write__7bf(I2C_PORT_PCA555_PMIC_BATT_GPIO, - I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf, + pca9555_write(I2C_PORT_PCA555_PMIC_BATT_GPIO, + I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS, PCA9555_CMD_OUTPUT_PORT_0, data); /* TODO: Find out from the spec */ msleep(10); /* Enable PMIC_EN: Set the Output port O0.0 to high level */ - pca9555_write__7bf(I2C_PORT_PCA555_PMIC_BATT_GPIO, - I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf, + pca9555_write(I2C_PORT_PCA555_PMIC_BATT_GPIO, + I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS, PCA9555_CMD_OUTPUT_PORT_0, data | PCA9555_IO_0); } @@ -106,23 +106,23 @@ void chipset_do_shutdown(void) { int data; - if (pca9555_read__7bf(I2C_PORT_PCA555_PMIC_BATT_GPIO, - I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf, + if (pca9555_read(I2C_PORT_PCA555_PMIC_BATT_GPIO, + I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS, PCA9555_CMD_OUTPUT_PORT_0, &data)) return; /* Disable SOC_3P3_EN_L: Set the Output port O0.1 to high level */ data |= PCA9555_IO_1; - pca9555_write__7bf(I2C_PORT_PCA555_PMIC_BATT_GPIO, - I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf, + pca9555_write(I2C_PORT_PCA555_PMIC_BATT_GPIO, + I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS, PCA9555_CMD_OUTPUT_PORT_0, data); /* TODO: Find out from the spec */ msleep(10); /* Disable PMIC_EN: Set the Output port O0.0 to low level */ - pca9555_write__7bf(I2C_PORT_PCA555_PMIC_BATT_GPIO, - I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf, + pca9555_write(I2C_PORT_PCA555_PMIC_BATT_GPIO, + I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS, PCA9555_CMD_OUTPUT_PORT_0, data & ~PCA9555_IO_0); } @@ -147,9 +147,9 @@ int board_get_version(void) { int data; - if (pca9555_read__7bf(I2C_PORT_PCA555_BOARD_ID_GPIO, - I2C_ADDR_PCA555_BOARD_ID_GPIO__7bf, - PCA9555_CMD_INPUT_PORT_1, &data)) + if (pca9555_read(I2C_PORT_PCA555_BOARD_ID_GPIO, + I2C_ADDR_PCA555_BOARD_ID_GPIO_FLAGS, + PCA9555_CMD_INPUT_PORT_1, &data)) return -1; return data & 0x0f; @@ -166,9 +166,9 @@ static void pmic_init(void) * Configure Port O0.0 as Output port - PMIC_EN * Configure Port O0.1 as Output port - SOC_3P3_EN_L */ - pca9555_write__7bf(I2C_PORT_PCA555_PMIC_BATT_GPIO, - I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf, - PCA9555_CMD_CONFIGURATION_PORT_0, 0xfc); + pca9555_write(I2C_PORT_PCA555_PMIC_BATT_GPIO, + I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS, + PCA9555_CMD_CONFIGURATION_PORT_0, 0xfc); /* * Set the Output port O0.0 to low level - PMIC_EN @@ -177,9 +177,9 @@ static void pmic_init(void) * POR of PCA9555 port is input with high impedance hence explicitly * configure the SOC_3P3_EN_L to high level. */ - pca9555_write__7bf(I2C_PORT_PCA555_PMIC_BATT_GPIO, - I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf, - PCA9555_CMD_OUTPUT_PORT_0, 0xfe); + pca9555_write(I2C_PORT_PCA555_PMIC_BATT_GPIO, + I2C_ADDR_PCA555_PMIC_BATT_GPIO_FLAGS, + PCA9555_CMD_OUTPUT_PORT_0, 0xfe); } DECLARE_HOOK(HOOK_INIT, pmic_init, HOOK_PRIO_INIT_I2C + 1); |