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authorDenis Brockus <dbrockus@chromium.org>2019-06-25 12:44:16 -0600
committerCommit Bot <commit-bot@chromium.org>2019-07-19 21:11:02 +0000
commitd1a18f82ed831d4e640336ff5571f5fa64bc7b36 (patch)
treec46aeb6136de1c27c66e3d5f662e9620161bef7b /board/glkrvp_ite
parent1f14229fa7e499dfcee07d17add187598ff0a46c (diff)
downloadchrome-ec-d1a18f82ed831d4e640336ff5571f5fa64bc7b36.tar.gz
Use 7bit I2C/SPI slave addresses in EC
Opt for 7bit slave addresses in EC code. If 8bit is expected by a driver, make it local and show this in the naming. Use __7b, __7bf and __8b as name extensions for i2c/spi addresses used in the EC codebase. __7b indicates a 7bit address by itself. __7bf indicates a 7bit address with optional flags attached. __8b indicates a 8bit address by itself. Allow space for 10bit addresses, even though this is not currently being used by any of our attached devices. These extensions are for verification purposes only and will be removed in the last pass of this ticket. I want to make sure the variable names reflect the type to help eliminate future 7/8/7-flags confusion. BUG=chromium:971296 BRANCH=none TEST=make buildall -j Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Diffstat (limited to 'board/glkrvp_ite')
-rw-r--r--board/glkrvp_ite/battery.c4
-rw-r--r--board/glkrvp_ite/board.c41
-rw-r--r--board/glkrvp_ite/board.h2
-rw-r--r--board/glkrvp_ite/chg_usb_pd.c8
4 files changed, 29 insertions, 26 deletions
diff --git a/board/glkrvp_ite/battery.c b/board/glkrvp_ite/battery.c
index d9d4bf9bf3..5665b1f557 100644
--- a/board/glkrvp_ite/battery.c
+++ b/board/glkrvp_ite/battery.c
@@ -199,8 +199,8 @@ enum battery_present battery_hw_present(void)
int data;
int rv;
- rv = pca9555_read(I2C_PORT_PCA555_PMIC_BATT_GPIO,
- I2C_ADDR_PCA555_PMIC_BATT_GPIO,
+ rv = pca9555_read__7bf(I2C_PORT_PCA555_PMIC_BATT_GPIO,
+ I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf,
PCA9555_CMD_INPUT_PORT_0, &data);
/* GPIO is low when the battery is physically present */
diff --git a/board/glkrvp_ite/board.c b/board/glkrvp_ite/board.c
index 4127a29634..9721549b14 100644
--- a/board/glkrvp_ite/board.c
+++ b/board/glkrvp_ite/board.c
@@ -31,7 +31,7 @@
#include "gpio_list.h"
#define I2C_PORT_PCA555_BOARD_ID_GPIO IT83XX_I2C_CH_C
-#define I2C_ADDR_PCA555_BOARD_ID_GPIO 0x40
+#define I2C_ADDR_PCA555_BOARD_ID_GPIO__7bf 0x20
/* I2C ports */
const struct i2c_port_t i2c_ports[] = {
@@ -55,8 +55,8 @@ void chipset_pre_init_callback(void)
{
int data;
- if (pca9555_read(I2C_PORT_PCA555_PMIC_BATT_GPIO,
- I2C_ADDR_PCA555_PMIC_BATT_GPIO,
+ if (pca9555_read__7bf(I2C_PORT_PCA555_PMIC_BATT_GPIO,
+ I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf,
PCA9555_CMD_OUTPUT_PORT_0, &data))
return;
@@ -70,16 +70,17 @@ void chipset_pre_init_callback(void)
/* Enable SOC_3P3_EN_L: Set the Output port O0.1 to low level */
data &= ~PCA9555_IO_1;
- pca9555_write(I2C_PORT_PCA555_PMIC_BATT_GPIO,
- I2C_ADDR_PCA555_PMIC_BATT_GPIO,
+ pca9555_write__7bf(I2C_PORT_PCA555_PMIC_BATT_GPIO,
+ I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf,
PCA9555_CMD_OUTPUT_PORT_0, data);
/* TODO: Find out from the spec */
msleep(10);
/* Enable PMIC_EN: Set the Output port O0.0 to high level */
- pca9555_write(I2C_PORT_PCA555_PMIC_BATT_GPIO,
- I2C_ADDR_PCA555_PMIC_BATT_GPIO, PCA9555_CMD_OUTPUT_PORT_0,
+ pca9555_write__7bf(I2C_PORT_PCA555_PMIC_BATT_GPIO,
+ I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf,
+ PCA9555_CMD_OUTPUT_PORT_0,
data | PCA9555_IO_0);
}
@@ -105,23 +106,24 @@ void chipset_do_shutdown(void)
{
int data;
- if (pca9555_read(I2C_PORT_PCA555_PMIC_BATT_GPIO,
- I2C_ADDR_PCA555_PMIC_BATT_GPIO,
+ if (pca9555_read__7bf(I2C_PORT_PCA555_PMIC_BATT_GPIO,
+ I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf,
PCA9555_CMD_OUTPUT_PORT_0, &data))
return;
/* Disable SOC_3P3_EN_L: Set the Output port O0.1 to high level */
data |= PCA9555_IO_1;
- pca9555_write(I2C_PORT_PCA555_PMIC_BATT_GPIO,
- I2C_ADDR_PCA555_PMIC_BATT_GPIO,
+ pca9555_write__7bf(I2C_PORT_PCA555_PMIC_BATT_GPIO,
+ I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf,
PCA9555_CMD_OUTPUT_PORT_0, data);
/* TODO: Find out from the spec */
msleep(10);
/* Disable PMIC_EN: Set the Output port O0.0 to low level */
- pca9555_write(I2C_PORT_PCA555_PMIC_BATT_GPIO,
- I2C_ADDR_PCA555_PMIC_BATT_GPIO, PCA9555_CMD_OUTPUT_PORT_0,
+ pca9555_write__7bf(I2C_PORT_PCA555_PMIC_BATT_GPIO,
+ I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf,
+ PCA9555_CMD_OUTPUT_PORT_0,
data & ~PCA9555_IO_0);
}
@@ -145,8 +147,9 @@ int board_get_version(void)
{
int data;
- if (pca9555_read(I2C_PORT_PCA555_BOARD_ID_GPIO,
- I2C_ADDR_PCA555_BOARD_ID_GPIO, PCA9555_CMD_INPUT_PORT_1, &data))
+ if (pca9555_read__7bf(I2C_PORT_PCA555_BOARD_ID_GPIO,
+ I2C_ADDR_PCA555_BOARD_ID_GPIO__7bf,
+ PCA9555_CMD_INPUT_PORT_1, &data))
return -1;
return data & 0x0f;
@@ -163,8 +166,8 @@ static void pmic_init(void)
* Configure Port O0.0 as Output port - PMIC_EN
* Configure Port O0.1 as Output port - SOC_3P3_EN_L
*/
- pca9555_write(I2C_PORT_PCA555_PMIC_BATT_GPIO,
- I2C_ADDR_PCA555_PMIC_BATT_GPIO,
+ pca9555_write__7bf(I2C_PORT_PCA555_PMIC_BATT_GPIO,
+ I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf,
PCA9555_CMD_CONFIGURATION_PORT_0, 0xfc);
/*
@@ -174,8 +177,8 @@ static void pmic_init(void)
* POR of PCA9555 port is input with high impedance hence explicitly
* configure the SOC_3P3_EN_L to high level.
*/
- pca9555_write(I2C_PORT_PCA555_PMIC_BATT_GPIO,
- I2C_ADDR_PCA555_PMIC_BATT_GPIO,
+ pca9555_write__7bf(I2C_PORT_PCA555_PMIC_BATT_GPIO,
+ I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf,
PCA9555_CMD_OUTPUT_PORT_0, 0xfe);
}
DECLARE_HOOK(HOOK_INIT, pmic_init, HOOK_PRIO_INIT_I2C + 1);
diff --git a/board/glkrvp_ite/board.h b/board/glkrvp_ite/board.h
index d1d3b7be7d..7c7834353c 100644
--- a/board/glkrvp_ite/board.h
+++ b/board/glkrvp_ite/board.h
@@ -115,7 +115,7 @@
#define I2C_PORT_USB_MUX IT83XX_I2C_CH_B
#define I2C_PORT_PCA555_PMIC_BATT_GPIO IT83XX_I2C_CH_C
-#define I2C_ADDR_PCA555_PMIC_BATT_GPIO 0x42
+#define I2C_ADDR_PCA555_PMIC_BATT_GPIO__7bf 0x21
/* EC exclude modules */
#undef CONFIG_ADC
diff --git a/board/glkrvp_ite/chg_usb_pd.c b/board/glkrvp_ite/chg_usb_pd.c
index 01c8f43f1e..7f3d049b29 100644
--- a/board/glkrvp_ite/chg_usb_pd.c
+++ b/board/glkrvp_ite/chg_usb_pd.c
@@ -35,7 +35,7 @@ const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_COUNT] = {
.bus_type = EC_BUS_TYPE_I2C,
.i2c_info = {
.port = IT83XX_I2C_CH_B,
- .addr = 0xa0,
+ .addr__7bf = 0x50,
},
.drv = &tcpci_tcpm_drv,
},
@@ -43,7 +43,7 @@ const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_COUNT] = {
.bus_type = EC_BUS_TYPE_I2C,
.i2c_info = {
.port = IT83XX_I2C_CH_B,
- .addr = 0xa4,
+ .addr__7bf = 0x52,
},
.drv = &tcpci_tcpm_drv,
},
@@ -52,11 +52,11 @@ BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == CONFIG_USB_PD_PORT_COUNT);
struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_COUNT] = {
{
- .port_addr = 0x20,
+ .port_addr = 0x10,
.driver = &ps874x_usb_mux_driver,
},
{
- .port_addr = 0x22,
+ .port_addr = 0x11,
.driver = &ps874x_usb_mux_driver,
},
};