diff options
| author | Edward Hill <ecgh@chromium.org> | 2018-05-23 17:11:17 -0600 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-05-25 20:31:50 -0700 |
| commit | 092e647d99c0100f0a51574eda28cc6130bb0df2 (patch) | |
| tree | ea3a9142fa1eb36e5ef777ab0a557f93e13868f5 /board/grunt/gpio.inc | |
| parent | 4ab9fc9fa9a0a246bc78eb70d301457abe8dc79b (diff) | |
| download | chrome-ec-092e647d99c0100f0a51574eda28cc6130bb0df2.tar.gz | |
careena: Make GPIOs match hardware
Update GPIO definitions for Careena to match hardware.
BUG=b:79704826
BRANCH=none
TEST=make BOARD=careena
Change-Id: I755e5fd8123eefdfa8d30ca2314435c28340e488
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1070989
Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'board/grunt/gpio.inc')
| -rw-r--r-- | board/grunt/gpio.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/grunt/gpio.inc b/board/grunt/gpio.inc index bfdbd0e376..4cd840ba02 100644 --- a/board/grunt/gpio.inc +++ b/board/grunt/gpio.inc @@ -79,7 +79,7 @@ GPIO(USB_C0_PD_RST_L_V0, PIN(F, 1), GPIO_INPUT) /* C0 PD Reset */ GPIO(USB_C0_PD_RST_L_V2, PIN(3, 2), GPIO_INPUT) /* C0 PD Reset */ GPIO(USB_C1_PD_RST_L, PIN(D, 5), GPIO_OUT_HIGH) /* C1 PD Reset */ GPIO(USB_C0_BC12_VBUS_ON_L_V0, PIN(8, 2), GPIO_INPUT) /* C0 BC1.2 Power */ -GPIO(USB_C0_BC12_VBUS_ON_L_V2, PIN(4, 0), GPIO_ODR_HIGH) /* C0 BC1.2 Power */ +GPIO(USB_C0_BC12_VBUS_ON_L, PIN(4, 0), GPIO_ODR_HIGH) /* C0 BC1.2 Power */ GPIO(USB_C1_BC12_VBUS_ON_L, PIN(B, 1), GPIO_ODR_HIGH) /* C1 BC1.2 Power */ GPIO(USB_C0_BC12_CHG_DET, PIN(6, 2), GPIO_INPUT) /* C0 BC1.2 Detect */ GPIO(USB_C1_BC12_CHG_DET, PIN(8, 3), GPIO_INPUT) /* C1 BC1.2 Detect */ |