diff options
| author | Edward Hill <ecgh@chromium.org> | 2018-02-02 18:19:53 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-02-12 18:59:33 -0800 |
| commit | 5d793e44c4b99c921699a62c4e885532ec6991b4 (patch) | |
| tree | 6774c0214aee2ed4c5bfc1c030b2da90e4125d7b /board/grunt | |
| parent | 52e5ab0730b79d17a60c403bdf9f0d49f3ec2709 (diff) | |
| download | chrome-ec-5d793e44c4b99c921699a62c4e885532ec6991b4.tar.gz | |
grunt: Disable system power (_A rails) in G3
EN_PWR_A GPIO turns on PP1800_A, PP5000_A, PP3300_A, PP950_A.
These should be off in G3 and on in S5 and higher.
VGATE (S0 power) is pulled high in G3 when SPOK (system power,
S5) is low because PP5000_A turns off, so add a check for this
and only pass through high VGATE when SPOK is also high.
Leave kahlee behavior unchanged (power stays on in G3).
BUG=b:72744306
BRANCH=none
TEST=power on and off SOC, see GPIO_EN_PWR_A go low in G3
Change-Id: I68a1ac10263ad84d5ee154613e5e248edb4d287c
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/904729
Commit-Ready: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'board/grunt')
| -rw-r--r-- | board/grunt/gpio.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/grunt/gpio.inc b/board/grunt/gpio.inc index ce93325d96..de75bbcbc1 100644 --- a/board/grunt/gpio.inc +++ b/board/grunt/gpio.inc @@ -25,7 +25,7 @@ GPIO_INT(VOLUME_UP_L, PIN(7, 5), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt GPIO_INT(USB_C0_CABLE_DET, PIN(3, 7), GPIO_INT_RISING, anx74xx_cable_det_interrupt) GPIO_INT(6AXIS_INT_L, PIN(8, 6), GPIO_INT_FALLING | GPIO_SEL_1P8V, bmi160_interrupt) -GPIO(EN_PWR_A, PIN(E, 2), GPIO_OUT_HIGH) /* Enable Power */ +GPIO(EN_PWR_A, PIN(E, 2), GPIO_OUT_LOW) /* Enable Power */ GPIO(EN_PP1800_SENSOR, PIN(6, 7), GPIO_OUT_LOW) /* Enable Power */ GPIO(ENABLE_BACKLIGHT_L, PIN(D, 3), GPIO_OUT_HIGH) /* Enable Backlight */ GPIO(PCH_RSMRST_L, PIN(C, 2), GPIO_OUT_LOW) /* RSMRST# to SOC */ |