diff options
author | Josh Tsai <josh_tsai@compal.corp-partner.google.com> | 2020-04-15 14:37:53 +0800 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2020-04-23 07:28:07 +0000 |
commit | 246044881c894aac0f552e5218b8207f74d105f7 (patch) | |
tree | 89c2b01dd6635b060f3136db7e83fefba581a936 /board/halvor/gpio.inc | |
parent | f99e7c124fc064416cdb202463287ea767457244 (diff) | |
download | chrome-ec-246044881c894aac0f552e5218b8207f74d105f7.tar.gz |
Halvor: Add 3rd USB-C GPIO and interrupt function
Because Halvor is support three USB-C
So add the 3rd USB-C GPIO and interrupt function
BUG=none
BRANCH=none
TEST=make BOARD=halvor
Change-Id: Ia4d4aa13f0a43f15f24d6d8321fd7a111fdb3ea5
Signed-off-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2148982
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Diffstat (limited to 'board/halvor/gpio.inc')
-rw-r--r-- | board/halvor/gpio.inc | 30 |
1 files changed, 23 insertions, 7 deletions
diff --git a/board/halvor/gpio.inc b/board/halvor/gpio.inc index 904289941c..e02e7adf2c 100644 --- a/board/halvor/gpio.inc +++ b/board/halvor/gpio.inc @@ -35,14 +35,17 @@ GPIO_INT(EC_ALS_RGB_INT_L, PIN(D, 4), GPIO_INT_FALLING, tcs3400_interrupt) GPIO_INT(TABLET_MODE_L, PIN(9, 5), GPIO_INT_BOTH, gmr_tablet_switch_isr) /* USB-C interrupts */ -GPIO_INT(USB_C0_TCPC_INT_ODL, PIN(E, 0), GPIO_INT_BOTH, tcpc_alert_event) -GPIO_INT(USB_C1_TCPC_INT_ODL, PIN(A, 2), GPIO_INT_BOTH, tcpc_alert_event) +GPIO_INT(USB_C0_TCPC_INT_ODL, PIN(E, 0), GPIO_INT_BOTH, halvor_tcpc_alert_event) +GPIO_INT(USB_C1_TCPC_INT_ODL, PIN(A, 2), GPIO_INT_BOTH, halvor_tcpc_alert_event) +GPIO_INT(USB_C2_TCPC_INT_ODL, PIN(A, 0), GPIO_INT_BOTH, halvor_tcpc_alert_event) -GPIO_INT(USB_C0_PPC_INT_ODL, PIN(6, 2), GPIO_INT_BOTH, ppc_interrupt) -GPIO_INT(USB_C1_PPC_INT_ODL, PIN(F, 5), GPIO_INT_BOTH, ppc_interrupt) +GPIO_INT(USB_C0_PPC_INT_ODL, PIN(6, 2), GPIO_INT_BOTH, halvor_ppc_interrupt) +GPIO_INT(USB_C1_PPC_INT_ODL, PIN(F, 5), GPIO_INT_BOTH, halvor_ppc_interrupt) +GPIO_INT(USB_C2_PPC_INT_ODL, PIN(A, 4), GPIO_INT_BOTH, halvor_ppc_interrupt) -GPIO_INT(USB_C0_BC12_INT_ODL, PIN(E, 4), GPIO_INT_BOTH, bc12_interrupt) -GPIO_INT(USB_C1_MIX_INT_ODL, PIN(0, 3), GPIO_INT_BOTH, bc12_interrupt) +GPIO_INT(USB_C0_MIX_INT_ODL, PIN(E, 4), GPIO_INT_BOTH, halvor_bc12_interrupt) +GPIO_INT(USB_C1_MIX_INT_ODL, PIN(0, 3), GPIO_INT_BOTH, halvor_bc12_interrupt) +GPIO_INT(USB_C2_MIX_INT_ODL, PIN(6, 1), GPIO_INT_BOTH, halvor_bc12_interrupt) /* HDMI interrupts */ @@ -90,10 +93,22 @@ GPIO(SYS_RST_ODL, PIN(C, 5), GPIO_ODR_HIGH) GPIO(EC_PCH_INT_ODL, PIN(B, 0), GPIO_ODR_HIGH) /* USB and USBC Signals */ -GPIO(USB_C1_RT_RST_ODL, PIN(8, 6), GPIO_ODR_LOW) +GPIO(USB_C0_RT_RST_ODL, PIN(6, 6), GPIO_ODR_LOW) +GPIO(USB_C1_RT_RST_ODL, PIN(8, 6), GPIO_ODR_LOW) +GPIO(USB_C2_RT_RST_ODL, PIN(3, 5), GPIO_ODR_LOW) + +GPIO(USB_C0_OC_ODL, PIN(B, 1), GPIO_ODR_HIGH) +GPIO(USB_C1_OC_ODL, PIN(5, 0), GPIO_ODR_HIGH) +GPIO(USB_C2_OC_ODL, PIN(3, 2), GPIO_ODR_HIGH) + +GPIO(USB_CO_FRS_EN, PIN(4, 0), GPIO_OUT_HIGH) +GPIO(USB_C1_FRS_EN, PIN(9, 4), GPIO_OUT_HIGH) +GPIO(USB_C2_FRS_EN, PIN(6, 0), GPIO_OUT_HIGH) /* Don't have a load switch for retimer */ UNIMPLEMENTED(USB_C1_LS_EN) +UNIMPLEMENTED(USB_C0_BC12_INT_ODL) +UNIMPLEMENTED(USB_C1_BC12_INT_ODL) /* Retimer Force Power enable is connected to AP */ UNIMPLEMENTED(USB_C1_RT_FORCE_PWR) @@ -138,6 +153,7 @@ GPIO(EC_BATT_PRES_ODL, PIN(E, 1), GPIO_INPUT) /* Physical HPD pins are not needed on EC as these are configured by PMC */ GPIO(USB_C0_DP_HPD, PIN(C, 6), GPIO_INPUT) GPIO(USB_C1_DP_HPD, PIN(7, 0), GPIO_INPUT) +GPIO(USB_C2_DP_HPD, PIN(B, 7), GPIO_INPUT) /* Alternate functions GPIO definitions */ ALTERNATE(PIN_MASK(B, BIT(5) | BIT(4)), 0, MODULE_I2C, 0) /* I2C0 */ |