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authorScott Collyer <scollyer@google.com>2019-04-24 11:46:04 -0700
committerchrome-bot <chrome-bot@chromium.org>2019-05-08 19:35:20 -0700
commit2befbf878db0d4a51349eac629d9a61e5459d2aa (patch)
tree8e430958db0448dfb91f3ef28049ba8339891575 /board/hatch/board.h
parentb8b8d41c4fe01cb068f2175831bc42e21e54bb1f (diff)
downloadchrome-ec-2befbf878db0d4a51349eac629d9a61e5459d2aa.tar.gz
hatch/kohaku: Account for TCPC reset polarity in ALERT handler
Reset polarity was added to tcpc_config so that the reset function could be common across different boards which have different TCPC selections. This was applied to pd_reset_mcu(), however, that CL did not take into account the reset polarity in the tcpc_get_alert_status function. This CL fixes that oversight. In addition, this CL fixes the name for kohaku's port 0 TCPC reset line to match the schematic. BUG=b:130194031 BRANCH=none TEST=verified on Hatch that both ports 0/1 function correctly. Change-Id: I0d75d3655c799d4c74f4a6fb1805c06c1fe99c06 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1582964 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Diffstat (limited to 'board/hatch/board.h')
-rw-r--r--board/hatch/board.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/board/hatch/board.h b/board/hatch/board.h
index 869372096d..560b16d84b 100644
--- a/board/hatch/board.h
+++ b/board/hatch/board.h
@@ -56,6 +56,7 @@
#define BOARD_TCPC_C0_RESET_POST_DELAY ANX74XX_RESET_HOLD_MS
#define BOARD_TCPC_C1_RESET_HOLD_DELAY PS8XXX_RESET_DELAY_MS
#define BOARD_TCPC_C1_RESET_POST_DELAY 0
+#define GPIO_USB_C1_TCPC_RST GPIO_USB_C1_TCPC_RST_ODL
/* USB Type A Features */
#define CONFIG_USB_PORT_POWER_SMART