bloonchipper: Reintroduce sleep lines to RO

Change https://crrev.com/c/2673909 removed the sleep lines from RO
in an effort to minimize the RO complexity.
Most notably, this isolated the deep-sleep/low-power-idle
logic to RW only.

Unfortunately, the sleep lines also control whether the SPI host interface
is listening, which allows it to ignore spurious communication.

It seems safer to reinstate the the sleep line with low power idle
active and directly disable CONFIG_LOW_POWER_IDLE in subsequent CL.

We reinstate the sleep line gpio logic from the following:
https://crrev.com/c5545464431669029f42829d542fa491d767ee5f/board/hatch_fp/board.c
This is the parent commit to the CL that refactors the sleep lines.

BRANCH=none
BUG=b:178746753
TEST=make -j tests-bloonchipper
TEST=# Connect servo_micro to a dragonclaw board.
     make proj-bloonchipper -j
     sudo servod --board=dragonclaw
     ./util/flash_ec --board=bloonchipper

     dut-control fpmcu_slp:off fpmcu_slp_alt:off
     dut-control pp3300_dx_mcu_mw # Should be around 20mw
     dut-control fpmcu_slp:on fpmcu_slp_alt:off
     dut-control pp3300_dx_mcu_mw # Should be less the 5mw
     dut-control fpmcu_slp:off fpmcu_slp_alt:on
     dut-control pp3300_dx_mcu_mw # Should be less the 5mw
     dut-control fpmcu_slp:on fpmcu_slp_alt:on
     dut-control pp3300_dx_mcu_mw # Should be less the 5mw
     dut-control fpmcu_slp:off fpmcu_slp_alt:off

     minicom -D$(dut-control -o raw_fpmcu_console_uart_pty)
     > reboot ro
     # Ctrl-A Q

     dut-control fpmcu_slp:off fpmcu_slp_alt:off
     dut-control pp3300_dx_mcu_mw # Should be around 20mw
     dut-control fpmcu_slp:on fpmcu_slp_alt:off
     dut-control pp3300_dx_mcu_mw # Should be less the 5mw
     dut-control fpmcu_slp:off fpmcu_slp_alt:on
     dut-control pp3300_dx_mcu_mw # Should be less the 5mw
     dut-control fpmcu_slp:on fpmcu_slp_alt:on
     dut-control pp3300_dx_mcu_mw # Should be less the 5mw
     dut-control fpmcu_slp:off fpmcu_slp_alt:off

     minicom -D$(dut-control -o raw_fpmcu_console_uart_pty)
     > reboot
     > fpenroll
     > fpmatch
     > reboot
     # Ctrl-A Q

Signed-off-by: Craig Hesling <hesling@chromium.org>
Change-Id: Ibb9e1aac4d242a70ed39e043daef39bab9ccc4d6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3078823
Reviewed-by: Josie Nordrum <josienordrum@google.com>

1 files changed, 0 insertions, 74 deletions

diff --git a/board/hatch_fp/board_rw.c b/board/hatch_fp/board_rw.c
index 09c78c5e5c..35709860e3 100644
--- a/board/hatch_fp/board_rw.c
+++ b/board/hatch_fp/board_rw.c
@@ -7,10 +7,8 @@
 #include "console.h"
 #include "fpsensor_detect.h"
 #include "gpio.h"
-#include "hooks.h"
 #include "registers.h"
 #include "spi.h"
-#include "system.h"
 #include "task.h"
 #include "usart_host_command.h"
 #include "util.h"
@@ -19,45 +17,6 @@
 #error "This file should only be built for RW."
 #endif
 
-/*
- * Some platforms have a broken SLP_S0_L signal (stuck to 0 in S0)
- * if set, ignore it and only uses SLP_S3_L for the AP state.
- */
-static bool broken_slp;
-
-static void ap_deferred(void)
-{
-	/*
-	 * Behavior:
-	 * AP Active  (ex. Intel S0):   SLP_L is 1
-	 * AP Suspend (ex. Intel S0ix): SLP_L is 0
-	 * The alternative SLP_ALT_L should be pulled high at all the times.
-	 *
-	 * Legacy Intel behavior:
-	 * in S3:   SLP_ALT_L is 0 and SLP_L is X.
-	 * in S0ix: SLP_ALT_L is 1 and SLP_L is 0.
-	 * in S0:   SLP_ALT_L is 1 and SLP_L is 1.
-	 * in S5/G3, the FP MCU should not be running.
-	 */
-	int running = gpio_get_level(GPIO_SLP_ALT_L) &&
-		      (gpio_get_level(GPIO_SLP_L) || broken_slp);
-
-	if (running) { /* S0 */
-		disable_sleep(SLEEP_MASK_AP_RUN);
-		hook_notify(HOOK_CHIPSET_RESUME);
-	} else { /* S0ix/S3 */
-		hook_notify(HOOK_CHIPSET_SUSPEND);
-		enable_sleep(SLEEP_MASK_AP_RUN);
-	}
-}
-DECLARE_DEFERRED(ap_deferred);
-
-/* PCH power state changes */
-void slp_event(enum gpio_signal signal)
-{
-	hook_call_deferred(&ap_deferred_data, 0);
-}
-
 /* SPI devices */
 struct spi_device_t spi_devices[] = {
 	/* Fingerprint sensor (SCLK at 4Mhz) */
@@ -87,39 +46,6 @@ static void configure_fp_sensor_spi(void)
 
 void board_init_rw(void)
 {
-	enum fp_transport_type ret_transport = get_fp_transport_type();
-
-	/*
-	 * FP_RST_ODL pin is defined in gpio_rw.inc (with GPIO_OUT_HIGH
-	 * flag) but not in gpio.inc, so RO leaves this pin set to 0 (reset
-	 * default), but RW doesn't initialize this pin to 1 because sysjump
-	 * to RW is a warm reset (see gpio_pre_init() in chip/stm32/gpio.c).
-	 * Explicitly reset FP_RST_ODL pin to default value.
-	 */
-	gpio_reset(GPIO_FP_RST_ODL);
-
-	if (ret_transport == FP_TRANSPORT_TYPE_UART) {
-		/*
-		 * The Zork variants currently have a broken SLP_S0_L signal
-		 * (stuck to 0 in S0). For now, unconditionally ignore it here
-		 * as they are the only UART users and the AP has no S0ix state.
-		 * TODO(b/174695987) once the RW AP firmware has been updated
-		 * on all those machines, remove this workaround.
-		 */
-		broken_slp = true;
-	}
-
 	/* Configure and enable SPI as master for FP sensor */
 	configure_fp_sensor_spi();
-
-	/* Enable interrupt on PCH power signals */
-	gpio_enable_interrupt(GPIO_SLP_ALT_L);
-	gpio_enable_interrupt(GPIO_SLP_L);
-
-	/*
-	 * Enable the SPI slave interface if the PCH is up.
-	 * Do not use hook_call_deferred(), because ap_deferred() will be
-	 * called after tasks with priority higher than HOOK task (very late).
-	 */
-	ap_deferred();
 }