diff options
author | Nicolas Norvez <norvez@chromium.org> | 2019-02-21 19:11:03 -0800 |
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committer | chrome-bot <chrome-bot@chromium.org> | 2019-04-03 18:13:42 -0700 |
commit | f3715a514e71ffdddc337d7e2635f970dda3c092 (patch) | |
tree | ee49608410c1eb32e014152198582349a6f16691 /board/hatch_fp/gpio.inc | |
parent | 204eb153327c59688fb430eb51471a76ecc61dee (diff) | |
download | chrome-ec-f3715a514e71ffdddc337d7e2635f970dda3c092.tar.gz |
hatch_fp: initial upload
First draft, lots of features still missing.
Dev key generated with this command:
openssl genrsa -3 -out board/hatch_fp/dev_key.pem 3072
BRANCH=none
BUG=b:124996507
TEST=make BOARD=hatch_fp
Change-Id: I7d7f0ce6807f7db9ee67e2e9b72ba6b2a0b87591
Signed-off-by: Nicolas Norvez <norvez@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1482059
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Diffstat (limited to 'board/hatch_fp/gpio.inc')
-rw-r--r-- | board/hatch_fp/gpio.inc | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/board/hatch_fp/gpio.inc b/board/hatch_fp/gpio.inc new file mode 100644 index 0000000000..807a76ae47 --- /dev/null +++ b/board/hatch_fp/gpio.inc @@ -0,0 +1,31 @@ +/* + * Copyright 2019 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Interrupts */ +GPIO_INT(FPS_INT, PIN(A, 0), GPIO_INT_RISING, fps_event) +GPIO_INT(SPI1_NSS, PIN(A, 4), GPIO_INPUT, spi_event) + +GPIO_INT(PCH_SLP_S0_L, PIN(B, 0), GPIO_INT_BOTH, slp_event) +GPIO_INT(PCH_SLP_S3_L, PIN(B, 1), GPIO_INT_BOTH, slp_event) +GPIO(PCH_SLP_S4_L, PIN(B, 2), GPIO_INPUT) +GPIO(PCH_SLP_SUS_L, PIN(B, 5), GPIO_INPUT) + +GPIO(WP, PIN(B, 7), GPIO_INPUT) + +/* Outputs */ +GPIO(EC_INT_L, PIN(A, 1), GPIO_OUT_HIGH) +GPIO(FP_RST_ODL, PIN(B,10), GPIO_OUT_HIGH) +GPIO(SPI2_NSS, PIN(B,12), GPIO_OUT_HIGH) +GPIO(USER_PRES_L, PIN(B, 9), GPIO_ODR_HIGH) + +UNIMPLEMENTED(ENTERING_RW) + +/* USART1: PA9/PA10 */ +ALTERNATE(PIN_MASK(A, 0x0600), GPIO_ALT_USART, MODULE_UART, GPIO_PULL_UP) +/* SPI1 slave from the AP: PA4/5/6/7 */ +ALTERNATE(PIN_MASK(A, 0x00f0), GPIO_ALT_SPI, MODULE_SPI, 0) +/* SPI2 master to sensor: PB12/13/14/15 */ +ALTERNATE(PIN_MASK(B, 0xf000), GPIO_ALT_SPI, MODULE_SPI_MASTER, 0) |