diff options
author | Steven Jian <steven.jian@intel.com> | 2015-04-01 01:25:42 +0800 |
---|---|---|
committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-05-27 03:58:16 +0000 |
commit | 937cc8a64e5971def21303e7a19a4ad9553e0ace (patch) | |
tree | 321543152e0c4d61e686ca7b92edd0d027bb168b /board/honeybuns/gpio.inc | |
parent | e216906c9327655d71b8758b7f11c2f744e55018 (diff) | |
download | chrome-ec-937cc8a64e5971def21303e7a19a4ad9553e0ace.tar.gz |
mec1322: Simplify GPIO lists
Our existing GPIO macros use port# / gpio#, but the concept of different
GPIO ports does not exist on the mec1322. Therefore, add new GPIO macros
for chips which do not have distinct GPIO ports.
BUG=None
BRANCH=None
TEST=make buildall -j
Change-Id: Ibda97c6563ad447d16dab39ecadab43ccb25174b
Signed-off-by: Steven Jian <steven.jian@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/262841
Reviewed-by: Anton Staaf <robotboy@chromium.org>
Diffstat (limited to 'board/honeybuns/gpio.inc')
-rw-r--r-- | board/honeybuns/gpio.inc | 50 |
1 files changed, 25 insertions, 25 deletions
diff --git a/board/honeybuns/gpio.inc b/board/honeybuns/gpio.inc index 553ab618fc..94b136acfb 100644 --- a/board/honeybuns/gpio.inc +++ b/board/honeybuns/gpio.inc @@ -5,50 +5,50 @@ * found in the LICENSE file. */ -/*GPIO_INT(DP_HPD, A, 0, GPIO_INT_BOTH, hpd_event)*/ -GPIO(DP_HPD, A, 0, GPIO_INPUT) +/*GPIO_INT(DP_HPD, PIN(A, 0), GPIO_INT_BOTH, hpd_event)*/ +GPIO(DP_HPD, PIN(A, 0), GPIO_INPUT) /* PD RX/TX */ -GPIO(USB_CC1_PD, A, 1, GPIO_ANALOG) -GPIO(PD_VBUS_P, A, 5, GPIO_ANALOG) -GPIO(PD_VBUS_N, A, 6, GPIO_ANALOG) -GPIO(PD_TX_EN, A, 15, GPIO_OUT_LOW) -GPIO(PD_TX_DATA, B, 4, GPIO_OUT_LOW) +GPIO(USB_CC1_PD, PIN(A, 1), GPIO_ANALOG) +GPIO(PD_VBUS_P, PIN(A, 5), GPIO_ANALOG) +GPIO(PD_VBUS_N, PIN(A, 6), GPIO_ANALOG) +GPIO(PD_TX_EN, PIN(A, 15), GPIO_OUT_LOW) +GPIO(PD_TX_DATA, PIN(B, 4), GPIO_OUT_LOW) /* Power and muxes control */ -GPIO(PP20000_EN, A, 8, GPIO_OUT_LOW) -GPIO(PPVAR_VBUS_EN, B, 12, GPIO_OUT_LOW) -GPIO(SS_MUX_OE_L, B, 13, GPIO_OUT_HIGH) -GPIO(SS_MUX_SEL, B, 14, GPIO_OUT_LOW) +GPIO(PP20000_EN, PIN(A, 8), GPIO_OUT_LOW) +GPIO(PPVAR_VBUS_EN, PIN(B, 12), GPIO_OUT_LOW) +GPIO(SS_MUX_OE_L, PIN(B, 13), GPIO_OUT_HIGH) +GPIO(SS_MUX_SEL, PIN(B, 14), GPIO_OUT_LOW) /* Display Port/HDMI */ -GPIO(PD_SBU_ENABLE, A, 7, GPIO_OUT_LOW) +GPIO(PD_SBU_ENABLE, PIN(A, 7), GPIO_OUT_LOW) /* Chip Resets */ -GPIO(BRIDGE_RESET_L, B, 0, GPIO_OUT_HIGH) -GPIO(SPLITTER_RESET_L, B, 1, GPIO_OUT_HIGH) -GPIO(HUB_RESET_L, B, 15, GPIO_OUT_HIGH) +GPIO(BRIDGE_RESET_L, PIN(B, 0), GPIO_OUT_HIGH) +GPIO(SPLITTER_RESET_L, PIN(B, 1), GPIO_OUT_HIGH) +GPIO(HUB_RESET_L, PIN(B, 15), GPIO_OUT_HIGH) /* * I2C pins should be configured as inputs until I2C module is * initialized. This will avoid driving the lines unintentionally. */ -GPIO(MASTER_I2C_SCL, B, 6, GPIO_INPUT) -GPIO(MASTER_I2C_SDA, B, 7, GPIO_INPUT) +GPIO(MASTER_I2C_SCL, PIN(B, 6), GPIO_INPUT) +GPIO(MASTER_I2C_SDA, PIN(B, 7), GPIO_INPUT) /* Test points */ -GPIO(TP6, A, 13, GPIO_OUT_HIGH /*GPIO_ODR_HIGH*/) -GPIO(TP7, A, 14, GPIO_OUT_LOW /*GPIO_ODR_HIGH*/) +GPIO(TP6, PIN(A, 13), GPIO_OUT_HIGH /*GPIO_ODR_HIGH*/) +GPIO(TP7, PIN(A, 14), GPIO_OUT_LOW /*GPIO_ODR_HIGH*/) /* Unimplemented signals which we need to emulate for now */ UNIMPLEMENTED(ENTERING_RW) UNIMPLEMENTED(WP_L) -ALTERNATE(B, 0x0018, 0, MODULE_USB_PD, 0) /* SPI1 SCK/MISO: PB3/PB4 */ -ALTERNATE(B, 0x0200, 2, MODULE_USB_PD, 0) /* TIM17_CH1: PB9 */ -ALTERNATE(A, 0x0600, 1, MODULE_UART, GPIO_PULL_UP) /* USART1: PA9/PA10 */ -ALTERNATE(A, 0x000C, 1, MODULE_UART, GPIO_PULL_UP) /* USART2: PA2/PA3 */ -ALTERNATE(B, 0x0C00, 4, MODULE_UART, GPIO_PULL_UP) /* USART3: PB10/PB11 */ -ALTERNATE(B, 0x00C0, 1, MODULE_I2C, 0) /* I2C MASTER: PB6/PB7 */ +ALTERNATE(PIN_MASK(B, 0x0018), 0, MODULE_USB_PD, 0) /* SPI1 SCK/MISO: PB3/PB4 */ +ALTERNATE(PIN_MASK(B, 0x0200), 2, MODULE_USB_PD, 0) /* TIM17_CH1: PB9 */ +ALTERNATE(PIN_MASK(A, 0x0600), 1, MODULE_UART, GPIO_PULL_UP) /* USART1: PA9/PA10 */ +ALTERNATE(PIN_MASK(A, 0x000C), 1, MODULE_UART, GPIO_PULL_UP) /* USART2: PA2/PA3 */ +ALTERNATE(PIN_MASK(B, 0x0C00), 4, MODULE_UART, GPIO_PULL_UP) /* USART3: PB10/PB11 */ +ALTERNATE(PIN_MASK(B, 0x00C0), 1, MODULE_I2C, 0) /* I2C MASTER: PB6/PB7 */ |