board/hyperdebug: Analog input support

The HyperDebug board is a versatile debugger, serving a similar purpose
to uServo for development boards for Google Security Chips or other
microcontrollers, rather than full Chromebooks.

This change allows the ADC circuits of HyperDebug to be enabled, and
allows about a dozen pins to be used as analog input.

BUG=b:269621551

Change-Id: I437412260003712ac4a5ff27f969182612feb35e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4259216
Tested-by: Jes Klinke <jbk@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
Auto-Submit: Jes Klinke <jbk@chromium.org>

4 files changed, 88 insertions, 17 deletions

diff --git a/board/hyperdebug/board.c b/board/hyperdebug/board.c
index 1fe4b1b9d1..f4a5fadcb4 100644
--- a/board/hyperdebug/board.c
+++ b/board/hyperdebug/board.c
@@ -4,6 +4,7 @@
  */
 /* HyperDebug board configuration */
 
+#include "adc.h"
 #include "common.h"
 #include "ec_version.h"
 #include "i2c.h"
@@ -166,6 +167,40 @@ const void *const usb_strings[] = {
 BUILD_ASSERT(ARRAY_SIZE(usb_strings) == USB_STR_COUNT);
 
 /******************************************************************************
+ * Set up USB PD
+ */
+
+/* ADC channels */
+const struct adc_t adc_channels[] = {
+	/*
+	 * All available ADC signals, converted to mV (3300mV/4096).  Every one
+	 * is declared with same name as the GPIO signal on the same pin, that
+	 * is how opentitantool identifies the signal.
+	 *
+	 * Technically, the Nucleo-L552ZE-Q board can run at either 1v8 or 3v3
+	 * supply, but we use HyperDebug only on 3v3 setting.  If in the future
+	 * we want to detect actual voltage, Vrefint could be used.  This would
+	 * also serve as calibration as the supply voltage may not be 3300mV
+	 * exactly.
+	 */
+	[ADC_CN9_11] = { "CN9_11", 3300, 4096, 0, STM32_AIN(1) },
+	[ADC_CN9_9] = { "CN9_9", 3300, 4096, 0, STM32_AIN(2) },
+	/*[ADC_CN10_9] = { "CN10_9", 3300, 4096, 0, STM32_AIN(3) },*/
+	[ADC_CN9_5] = { "CN9_5", 3300, 4096, 0, STM32_AIN(4) },
+	[ADC_CN10_29] = { "CN10_29", 3300, 4096, 0, STM32_AIN(5) },
+	[ADC_CN10_11] = { "CN10_11", 3300, 4096, 0, STM32_AIN(6) },
+	[ADC_CN9_3] = { "CN9_3", 3300, 4096, 0, STM32_AIN(7) },
+	[ADC_CN9_1] = { "CN9_1", 3300, 4096, 0, STM32_AIN(8) },
+	[ADC_CN7_9] = { "CN7_9", 3300, 4096, 0, STM32_AIN(9) },
+	[ADC_CN7_10] = { "CN7_10", 3300, 4096, 0, STM32_AIN(10) },
+	[ADC_CN7_12] = { "CN7_12", 3300, 4096, 0, STM32_AIN(11) },
+	[ADC_CN7_14] = { "CN7_14", 3300, 4096, 0, STM32_AIN(12) },
+	[ADC_CN9_7] = { "CN9_7", 3300, 4096, 0, STM32_AIN(15) },
+	[ADC_CN10_7] = { "CN10_7", 3300, 4096, 0, STM32_AIN(16) },
+};
+BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
+
+/******************************************************************************
  * Initialize board.
  */
 
@@ -200,6 +235,11 @@ static void board_init(void)
 	/* Configure SPI GPIOs */
 	gpio_config_module(MODULE_SPI, 1);
 
+	/* Enable ADC */
+	STM32_RCC_AHB2ENR |= STM32_RCC_AHB2ENR_ADCEN;
+	/* Initialize the ADC by performing a fake reading */
+	adc_read_channel(ADC_CN9_11);
+
 	/* Enable DAC */
 	STM32_RCC_APB1ENR |= STM32_RCC_APB1ENR1_DAC1EN;
 
diff --git a/board/hyperdebug/board.h b/board/hyperdebug/board.h
index c5afe4d014..7d60059ebe 100644
--- a/board/hyperdebug/board.h
+++ b/board/hyperdebug/board.h
@@ -50,7 +50,11 @@
 #define STM32_PLLR 2
 
 #define STM32_USE_PLL
+#define CPU_CLOCK 104000000
 
+#define CONFIG_ADC
+#define CONFIG_ADC_SAMPLE_TIME STM32_ADC_SMPR_247_5_CY
+#undef CONFIG_ADC_WATCHDOG
 #define CONFIG_BOARD_PRE_INIT
 
 #define CONFIG_ROM_BASE 0x0
@@ -197,6 +201,28 @@ enum usb_strings {
 	USB_STR_COUNT
 };
 
+/* ADC signal */
+enum adc_channel {
+	ADC_CN9_11, /* ADC12_IN1 */
+	ADC_CN9_9, /* ADC12_IN2 */
+	/* ADC_CN10_9, */ /* ADC12_IN3, Nucleo USB VBUS sense */
+	ADC_CN9_5, /* ADC12_IN4 */
+	ADC_CN10_29, /* ADC12_IN5 */
+	ADC_CN10_11, /* ADC12_IN6 */
+	ADC_CN9_3, /* ADC12_IN7 */
+	ADC_CN9_1, /* ADC12_IN8 */
+	ADC_CN7_9, /* ADC12_IN9 */
+	ADC_CN7_10, /* ADC12_IN10 */
+	ADC_CN7_12, /* ADC12_IN11 */
+	ADC_CN7_14, /* ADC12_IN12 */
+	/* PC4, not on connectors */ /* ADC12_IN13 */
+	/* PC5, not on connectors */ /* ADC12_IN14 */
+	ADC_CN9_7, /* ADC12_IN15 */
+	ADC_CN10_7, /* ADC12_IN16 */
+	/* Number of ADC channels */
+	ADC_CH_COUNT
+};
+
 /* Timeout for initializing the OctoSPI controller. */
 #define OCTOSPI_INIT_TIMEOUT_US (100 * MSEC)
 
diff --git a/board/hyperdebug/gpio.c b/board/hyperdebug/gpio.c
index 8ab9f7ce6b..53a4929b3c 100644
--- a/board/hyperdebug/gpio.c
+++ b/board/hyperdebug/gpio.c
@@ -296,7 +296,7 @@ static int command_gpio_mode(int argc, const char **argv)
 		return EC_ERROR_PARAM1;
 	flags = gpio_get_flags(gpio);
 
-	flags = flags & ~(GPIO_INPUT | GPIO_OUTPUT | GPIO_OPEN_DRAIN);
+	flags &= ~(GPIO_INPUT | GPIO_OUTPUT | GPIO_OPEN_DRAIN | GPIO_ANALOG);
 	dac_enable_value &= ~dac_channels[gpio].enable_mask;
 	if (strcasecmp(argv[2], "input") == 0)
 		flags |= GPIO_INPUT;
@@ -304,6 +304,8 @@ static int command_gpio_mode(int argc, const char **argv)
 		flags |= GPIO_OUTPUT | GPIO_OPEN_DRAIN;
 	else if (strcasecmp(argv[2], "pushpull") == 0)
 		flags |= GPIO_OUTPUT;
+	else if (strcasecmp(argv[2], "adc") == 0)
+		flags |= GPIO_ANALOG;
 	else if (strcasecmp(argv[2], "dac") == 0) {
 		if (dac_channels[gpio].enable_mask == 0) {
 			ccprintf("Error: Pin does not support dac\n");
@@ -324,7 +326,7 @@ static int command_gpio_mode(int argc, const char **argv)
 }
 DECLARE_CONSOLE_COMMAND_FLAGS(
 	gpiomode, command_gpio_mode,
-	"name <input | opendrain | pushpull | dac | alternate>",
+	"name <input | opendrain | pushpull | adc | dac | alternate>",
 	"Set a GPIO mode", CMD_FLAG_RESTRICTED);
 
 /*
@@ -433,7 +435,8 @@ static int command_gpio_multiset(int argc, const char **argv)
 	}
 
 	if (argc > 4 && strcasecmp(argv[4], "-") != 0) {
-		flags = flags & ~(GPIO_INPUT | GPIO_OUTPUT | GPIO_OPEN_DRAIN);
+		flags &= ~(GPIO_INPUT | GPIO_OUTPUT | GPIO_OPEN_DRAIN |
+			   GPIO_ANALOG);
 		dac_enable_value &= ~dac_channels[gpio].enable_mask;
 		if (strcasecmp(argv[4], "input") == 0)
 			flags |= GPIO_INPUT;
@@ -441,6 +444,8 @@ static int command_gpio_multiset(int argc, const char **argv)
 			flags |= GPIO_OUTPUT | GPIO_OPEN_DRAIN;
 		else if (strcasecmp(argv[4], "pushpull") == 0)
 			flags |= GPIO_OUTPUT;
+		else if (strcasecmp(argv[4], "adc") == 0)
+			flags |= GPIO_ANALOG;
 		else if (strcasecmp(argv[4], "dac") == 0) {
 			if (dac_channels[gpio].enable_mask == 0) {
 				ccprintf("Error: Pin does not support dac\n");
diff --git a/board/hyperdebug/gpio.inc b/board/hyperdebug/gpio.inc
index f13a2406ca..16e54891e0 100644
--- a/board/hyperdebug/gpio.inc
+++ b/board/hyperdebug/gpio.inc
@@ -21,12 +21,12 @@ GPIO_INT(CN7_5,			PIN(B, 13), GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)
 /* CN7_6 is VREFP */
 GPIO_INT(CN7_7,			PIN(D, 12), GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)
 /* CN7_8 is GND */
-GPIO_INT(CN7_9,			PIN(A, 4),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge) /* DAC0 */
-GPIO_INT(CN7_10,		PIN(A, 5),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge) /* DAC1 */
+GPIO_INT(CN7_9,			PIN(A, 4),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge) /* DAC0, ADC12_IN9 */
+GPIO_INT(CN7_10,		PIN(A, 5),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge) /* DAC1, ADC12_IN10 */
 GPIO_INT(CN7_11,		PIN(B, 4),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)
-GPIO_INT(CN7_12,		PIN(A, 6),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)
+GPIO_INT(CN7_12,		PIN(A, 6),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge) /* ADC12_IN11 */
 /*GPIO_INT(CN7_13,		PIN(B, 5),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge) Nucleo USB-C */
-GPIO_INT(CN7_14,		PIN(A, 7),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)
+GPIO_INT(CN7_14,		PIN(A, 7),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge) /* ADC12_IN12 */
 GPIO_INT(CN7_15,		PIN(B, 3),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)
 GPIO_INT(CN7_16,		PIN(D, 14), GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)
 /*GPIO_INT(CN7_17,		PIN(A, 4),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)*/
@@ -51,17 +51,17 @@ GPIO_INT(CN8_14,		PIN(F, 3),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)
 /* CN8_15 is VIN */
 GPIO_INT(CN8_16,		PIN(F, 5),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)
 
-GPIO_INT(CN9_1,			PIN(A, 3),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)
+GPIO_INT(CN9_1,			PIN(A, 3),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)     /* ADC12_IN8 */
 GPIO_INT(CN9_2,			PIN(D, 7),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)
-GPIO_INT(CN9_3,			PIN(A, 2),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)
+GPIO_INT(CN9_3,			PIN(A, 2),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)     /* ADC12_IN7 */
 GPIO_INT(CN9_4,			PIN(D, 6),  GPIO_ALTERNATE | GPIO_INT_BOTH, gpio_edge) /* UART2 RX */
-GPIO_INT(CN9_5,			PIN(C, 3),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)
+GPIO_INT(CN9_5,			PIN(C, 3),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)     /* ADC12_IN4 */
 GPIO_INT(CN9_6,			PIN(D, 5),  GPIO_ALTERNATE | GPIO_INT_BOTH, gpio_edge) /* UART2 TX */
-GPIO_INT(CN9_7,			PIN(B, 0),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)
+GPIO_INT(CN9_7,			PIN(B, 0),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)     /* ADC12_IN15 */
 GPIO_INT(CN9_8,			PIN(D, 4),  GPIO_ALTERNATE | GPIO_INT_BOTH, gpio_edge) /* SPI2 CODI */
-GPIO_INT(CN9_9,			PIN(C, 1),  GPIO_ALTERNATE | GPIO_INT_BOTH, gpio_edge) /* I2C3 SDA */
+GPIO_INT(CN9_9,			PIN(C, 1),  GPIO_ALTERNATE | GPIO_INT_BOTH, gpio_edge) /* I2C3 SDA, ADC12_IN2 */
 GPIO_INT(CN9_10,		PIN(D, 3),  GPIO_ALTERNATE | GPIO_INT_BOTH, gpio_edge) /* SPI2 CIDO */
-GPIO_INT(CN9_11,		PIN(C, 0),  GPIO_ALTERNATE | GPIO_INT_BOTH, gpio_edge) /* I2C3 SCL */
+GPIO_INT(CN9_11,		PIN(C, 0),  GPIO_ALTERNATE | GPIO_INT_BOTH, gpio_edge) /* I2C3 SCL, ADC12_IN1 */
 /* CN9_12 is GND */
 GPIO_INT(CN9_13,		PIN(B, 2),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)
 GPIO_INT(CN9_14,		PIN(E, 2),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)
@@ -88,11 +88,11 @@ GPIO_INT(CN10_2,		PIN(F, 13), GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)
 GPIO_INT(CN10_4,		PIN(E, 9),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)
 /* CN10_5 is GND */
 GPIO_INT(CN10_6,		PIN(E, 11), GPIO_OUT_HIGH | GPIO_INT_BOTH, gpio_edge) /* QSPI CS */
-GPIO_INT(CN10_7,		PIN(B, 1),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)
+GPIO_INT(CN10_7,		PIN(B, 1),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)    /* ADC12_IN16 */
 GPIO_INT(CN10_8,		PIN(F, 14), GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)
-/*GPIO_INT(CN10_9,		PIN(C, 2),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge) Nucleo USB VBUS sense */
+/*GPIO_INT(CN10_9,		PIN(C, 2),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge) Nucleo USB VBUS sense, ADC12_IN3 */
 GPIO_INT(CN10_10,		PIN(E, 13), GPIO_ALTERNATE | GPIO_INT_BOTH, gpio_edge) /* QSPI D1 */
-GPIO_INT(CN10_11,		PIN(A, 1),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)
+GPIO_INT(CN10_11,		PIN(A, 1),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)     /* ADC12_IN6 */
 GPIO_INT(CN10_12,		PIN(F, 15), GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)
 /*GPIO_INT(CN10_13,		PIN(A, 2),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)*/
 GPIO_INT(CN10_14,		PIN(D, 8),  GPIO_ALTERNATE | GPIO_INT_BOTH, gpio_edge) /* UART3 TX */
@@ -110,7 +110,7 @@ GPIO_INT(CN10_25,		PIN(E, 14), GPIO_ALTERNATE | GPIO_INT_BOTH, gpio_edge) /* QSP
 /*GPIO_INT(CN10_26,		PIN(E, 12), GPIO_INPUT | GPIO_INT_BOTH, gpio_edge) QSPI */
 /* CN10_27 is GND */
 /*GPIO_INT(CN10_28,		PIN(E, 14), GPIO_INPUT | GPIO_INT_BOTH, gpio_edge) QSPI */
-GPIO_INT(CN10_29,		PIN(A, 0),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)
+GPIO_INT(CN10_29,		PIN(A, 0),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)     /* ADC12_IN5 */
 /*GPIO_INT(CN10_30,		PIN(E, 15), GPIO_INPUT | GPIO_INT_BOTH, gpio_edge) QSPI */
 GPIO_INT(CN10_31,		PIN(A, 8),  GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)
 /*GPIO_INT(CN10_32,		PIN(B, 10), GPIO_INPUT | GPIO_INT_BOTH, gpio_edge)*/