Jerry: Revert "Remove obsolete EC targets"

Jerry is being used for FAFT in the lab.  Remove Pinky instead.

This reverts part of commit bdc680d8ed7ea24cdfb1b5498f73a1008c71ad37.

BUG=chromium:511324
TEST=make buildall -j
BRANCH=none

Change-Id: I034a814ffe3397728e443f99ed270d412be1bc1d
Signed-off-by: Myles Watson <mylesgw@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/288236
Reviewed-by: Dan Shi <dshi@chromium.org>
Reviewed-by: Wai-Hong Tam <waihong@chromium.org>

7 files changed, 316 insertions, 0 deletions

diff --git a/board/jerry/Makefile b/board/jerry/Makefile
new file mode 120000
index 0000000000..94aaae2c4d
--- /dev/null
+++ b/board/jerry/Makefile
@@ -0,0 +1 @@
+../../Makefile
\ No newline at end of file
diff --git a/board/jerry/battery.c b/board/jerry/battery.c
new file mode 100644
index 0000000000..02b491443f
--- /dev/null
+++ b/board/jerry/battery.c
@@ -0,0 +1,54 @@
+/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ *
+ * Battery pack vendor provided charging profile
+ */
+
+#include "battery.h"
+#include "battery_smart.h"
+#include "console.h"
+#include "gpio.h"
+#include "host_command.h"
+#include "util.h"
+
+/* Shutdown mode parameter to write to manufacturer access register */
+#define SB_SHUTDOWN_DATA	0x0010
+
+static const struct battery_info info = {
+	.voltage_max    = 8400,		/* mV */
+	.voltage_normal = 7400,
+	.voltage_min    = 6000,
+	.precharge_current  = 256,	/* mA */
+	.start_charging_min_c = 0,
+	.start_charging_max_c = 45,
+	.charging_min_c       = 0,
+	.charging_max_c       = 45,
+	.discharging_min_c    = 0,
+	.discharging_max_c    = 60,
+};
+
+const struct battery_info *battery_get_info(void)
+{
+	return &info;
+}
+
+static int cutoff(void)
+{
+	int rv;
+
+	/* Ship mode command must be sent twice to take effect */
+	rv = sb_write(SB_MANUFACTURER_ACCESS, SB_SHUTDOWN_DATA);
+
+	if (rv != EC_SUCCESS)
+		return rv;
+
+	return sb_write(SB_MANUFACTURER_ACCESS, SB_SHUTDOWN_DATA);
+}
+
+
+int board_cut_off_battery(void)
+{
+	return cutoff();
+}
+
diff --git a/board/jerry/board.c b/board/jerry/board.c
new file mode 100644
index 0000000000..a91a25c6a4
--- /dev/null
+++ b/board/jerry/board.c
@@ -0,0 +1,75 @@
+/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+/* Veyron board-specific configuration */
+
+#include "battery.h"
+#include "chipset.h"
+#include "common.h"
+#include "extpower.h"
+#include "gpio.h"
+#include "i2c.h"
+#include "keyboard_raw.h"
+#include "lid_switch.h"
+#include "power.h"
+#include "power_button.h"
+#include "power.h"
+#include "pwm.h"
+#include "pwm_chip.h"
+#include "registers.h"
+#include "spi.h"
+#include "task.h"
+#include "util.h"
+#include "timer.h"
+#include "charger.h"
+
+#define GPIO_KB_INPUT  (GPIO_INPUT | GPIO_PULL_UP | GPIO_INT_BOTH)
+#define GPIO_KB_OUTPUT GPIO_ODR_HIGH
+
+#include "gpio_list.h"
+
+
+/* power signal list.  Must match order of enum power_signal. */
+const struct power_signal_info power_signal_list[] = {
+	{GPIO_SOC_POWER_GOOD, 1, "POWER_GOOD"},
+	{GPIO_SUSPEND_L,      1, "SUSPEND#_ASSERTED"},
+};
+BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT);
+
+/* I2C ports */
+const struct i2c_port_t i2c_ports[] = {
+	{"master", I2C_PORT_MASTER, 100},
+};
+const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
+
+/* PWM channels. Must be in the exactly same order as in enum pwm_channel. */
+const struct pwm_t pwm_channels[] = {
+	{STM32_TIM(2), STM32_TIM_CH(3),
+	 PWM_CONFIG_ACTIVE_LOW},
+};
+BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT);
+
+/**
+ * Discharge battery when on AC power for factory test.
+ */
+int board_discharge_on_ac(int enable)
+{
+	return charger_discharge_on_ac(enable);
+}
+
+void board_config_pre_init(void)
+{
+	/* enable SYSCFG clock */
+	STM32_RCC_APB2ENR |= 1 << 0;
+
+	/* Remap USART DMA to match the USART driver */
+	/*
+	 * the DMA mapping is :
+	 *  Chan 2 : TIM1_CH1
+	 *  Chan 3 : SPI1_TX
+	 *  Chan 4 : USART1_TX
+	 *  Chan 5 : USART1_RX
+	 */
+	STM32_SYSCFG_CFGR1 |= (1 << 9) | (1 << 10); /* Remap USART1 RX/TX DMA */
+}
diff --git a/board/jerry/board.h b/board/jerry/board.h
new file mode 100644
index 0000000000..6ba79dbe1b
--- /dev/null
+++ b/board/jerry/board.h
@@ -0,0 +1,91 @@
+/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Veyron board configuration */
+
+#ifndef __BOARD_H
+#define __BOARD_H
+
+/* Optional features */
+#define CONFIG_AP_HANG_DETECT
+#define CONFIG_BATTERY_CUT_OFF
+#define CONFIG_BATTERY_SMART
+#define CONFIG_BOARD_PRE_INIT
+#define CONFIG_CHARGER
+#define CONFIG_CHARGER_BQ24715
+#define CONFIG_CHARGER_DISCHARGE_ON_AC
+#define CONFIG_CHARGER_V2
+#define CONFIG_CHIPSET_ROCKCHIP
+#define CONFIG_EXTPOWER_GPIO
+#define CONFIG_FORCE_CONSOLE_RESUME
+#define CONFIG_HOST_COMMAND_STATUS
+#define CONFIG_I2C
+#define CONFIG_KEYBOARD_COL2_INVERTED
+#define CONFIG_KEYBOARD_PROTOCOL_MKBP
+#define CONFIG_LED_COMMON
+#define CONFIG_LED_POLICY_STD
+#define CONFIG_LED_BAT_ACTIVE_LOW
+#define CONFIG_LED_POWER_ACTIVE_LOW
+#define CONFIG_LOW_POWER_IDLE
+#define CONFIG_LOW_POWER_S0
+#define CONFIG_POWER_BUTTON
+#define CONFIG_POWER_BUTTON_ACTIVE_STATE 1
+#define CONFIG_POWER_COMMON
+#define CONFIG_PWM
+#define CONFIG_SPI
+#define CONFIG_STM_HWTIMER32
+#define CONFIG_UART_RX_DMA
+#define CONFIG_VBOOT_HASH
+#undef CONFIG_WATCHDOG_HELP
+
+#define CONFIG_HIBERNATE_WAKEUP_PINS (STM32_PWR_CSR_EWUP1 | STM32_PWR_CSR_EWUP6)
+
+#ifndef __ASSEMBLER__
+
+/* 48 MHz SYSCLK clock frequency */
+#define CPU_CLOCK 48000000
+
+/* Keyboard output port list */
+#define KB_OUT_PORT_LIST GPIO_A, GPIO_B, GPIO_C
+
+/* Single I2C port, where the EC is the master. */
+#define I2C_PORT_MASTER 0
+#define I2C_PORT_BATTERY I2C_PORT_MASTER
+#define I2C_PORT_CHARGER I2C_PORT_MASTER
+
+/* Timer selection */
+#define TIM_CLOCK32  2
+#define TIM_WATCHDOG 4
+
+#include "gpio_signal.h"
+
+enum power_signal {
+	RK_POWER_GOOD = 0,
+	RK_SUSPEND_ASSERTED,
+	/* Number of power signals */
+	POWER_SIGNAL_COUNT
+};
+
+enum pwm_channel {
+	PWM_CH_POWER_LED = 0,
+	/* Number of PWM channels */
+	PWM_CH_COUNT
+};
+
+/* Charger module */
+#define CONFIG_CHARGER_SENSE_RESISTOR 10 /* Charge sense resistor, mOhm */
+#define CONFIG_CHARGER_SENSE_RESISTOR_AC 20 /* Input sensor resistor, mOhm */
+/* Input current limit for 45W AC adapter:
+ * 45W/19V*85%=2013mA, choose the closest charger setting = 2048mA
+ */
+#define CONFIG_CHARGER_INPUT_CURRENT 2048 /* mA, based on Link HW design */
+#define CONFIG_CHARGER_CURRENT_LIMIT 3000 /* PL102 inductor 3.0A(3.8A) */
+
+/* Discharge battery when on AC power for factory test. */
+int board_discharge_on_ac(int enable);
+
+#endif /* !__ASSEMBLER__ */
+
+#endif /* __BOARD_H */
diff --git a/board/jerry/build.mk b/board/jerry/build.mk
new file mode 100644
index 0000000000..e9b9999094
--- /dev/null
+++ b/board/jerry/build.mk
@@ -0,0 +1,13 @@
+# -*- makefile -*-
+# Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+#
+# Board specific files build
+
+# the IC is STmicro STM32F071RB
+CHIP:=stm32
+CHIP_FAMILY:=stm32f0
+CHIP_VARIANT:=stm32f07x
+
+board-y=board.o battery.o
diff --git a/board/jerry/ec.tasklist b/board/jerry/ec.tasklist
new file mode 100644
index 0000000000..318cfe2553
--- /dev/null
+++ b/board/jerry/ec.tasklist
@@ -0,0 +1,23 @@
+/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/**
+ * List of enabled tasks in the priority order
+ *
+ * The first one has the lowest priority.
+ *
+ * For each task, use the macro TASK(n, r, d, s) where :
+ * 'n' in the name of the task
+ * 'r' in the main routine of the task
+ * 'd' in an opaque parameter passed to the routine at startup
+ * 's' is the stack size in bytes; must be a multiple of 8
+ */
+#define CONFIG_TASK_LIST \
+	TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_ALWAYS(CHARGER, charger_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_ALWAYS(HOSTCMD, host_command_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(CONSOLE, console_task, NULL, TASK_STACK_SIZE) \
+	TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE)
diff --git a/board/jerry/gpio.inc b/board/jerry/gpio.inc
new file mode 100644
index 0000000000..f334dfcf83
--- /dev/null
+++ b/board/jerry/gpio.inc
@@ -0,0 +1,59 @@
+/* -*- mode:c -*-
+ *
+ * Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Inputs with interrupt handlers are first for efficiency */
+GPIO_INT(POWER_BUTTON_L, PIN(B, 5),  GPIO_INT_BOTH,                power_button_interrupt) /* wk6 */ /* active high, the name is for compatibility with existing code */
+GPIO_INT(SOC_POWER_GOOD, PIN(A, 3),  GPIO_INT_BOTH,                power_signal_interrupt)
+GPIO_INT(LID_OPEN,       PIN(C, 13), GPIO_INT_BOTH,                lid_interrupt)
+GPIO_INT(SUSPEND_L,      PIN(C, 7),  GPIO_INT_BOTH,                power_signal_interrupt)
+GPIO_INT(SPI1_NSS,       PIN(A, 4),  GPIO_INT_BOTH,                spi_event)
+GPIO_INT(AC_PRESENT,     PIN(C, 6),  GPIO_INT_BOTH | GPIO_PULL_UP, extpower_interrupt)
+
+/* Keyboard inputs */
+GPIO_INT(KB_IN00, PIN(C, 8),  GPIO_KB_INPUT, keyboard_raw_gpio_interrupt)
+GPIO_INT(KB_IN01, PIN(C, 9),  GPIO_KB_INPUT, keyboard_raw_gpio_interrupt)
+GPIO_INT(KB_IN02, PIN(C, 10), GPIO_KB_INPUT, keyboard_raw_gpio_interrupt)
+GPIO_INT(KB_IN03, PIN(C, 11), GPIO_KB_INPUT, keyboard_raw_gpio_interrupt)
+GPIO_INT(KB_IN04, PIN(C, 12), GPIO_KB_INPUT, keyboard_raw_gpio_interrupt)
+GPIO_INT(KB_IN05, PIN(C, 14), GPIO_KB_INPUT, keyboard_raw_gpio_interrupt)
+GPIO_INT(KB_IN06, PIN(C, 15), GPIO_KB_INPUT, keyboard_raw_gpio_interrupt)
+GPIO_INT(KB_IN07, PIN(D, 2),  GPIO_KB_INPUT, keyboard_raw_gpio_interrupt)
+
+/* Other inputs */
+GPIO(EC_WAKE, PIN(A, 0), GPIO_INPUT | GPIO_PULL_DOWN) /* wk1 */
+GPIO(WP_L,    PIN(B, 4), GPIO_INPUT)
+
+/* Outputs */
+GPIO(BAT_LED_RED,       PIN(B, 11), GPIO_OUT_HIGH)
+GPIO(BAT_LED_GREEN,     PIN(A, 11), GPIO_OUT_HIGH)
+GPIO(EC_BL_OVERRIDE,    PIN(F, 1),  GPIO_OUT_LOW)
+GPIO(EC_INT,            PIN(B, 9),  GPIO_OUT_LOW)
+GPIO(ENTERING_RW,       PIN(F, 0),  GPIO_OUT_LOW)
+GPIO(I2C1_SCL,          PIN(B, 6),  GPIO_ODR_HIGH)
+GPIO(I2C1_SDA,          PIN(B, 7),  GPIO_ODR_HIGH)
+GPIO(KB_OUT00,          PIN(B, 0),  GPIO_KB_OUTPUT)
+GPIO(KB_OUT01,          PIN(B, 8),  GPIO_KB_OUTPUT)
+GPIO(KB_OUT02,          PIN(B, 12), GPIO_OUT_LOW) /* Inverted from silegro */
+GPIO(KB_OUT03,          PIN(B, 13), GPIO_KB_OUTPUT)
+GPIO(KB_OUT04,          PIN(B, 14), GPIO_KB_OUTPUT)
+GPIO(KB_OUT05,          PIN(B, 15), GPIO_KB_OUTPUT)
+GPIO(KB_OUT06,          PIN(C, 0),  GPIO_KB_OUTPUT)
+GPIO(KB_OUT07,          PIN(C, 1),  GPIO_KB_OUTPUT)
+GPIO(KB_OUT08,          PIN(C, 2),  GPIO_KB_OUTPUT)
+GPIO(KB_OUT09,          PIN(B, 1),  GPIO_KB_OUTPUT)
+GPIO(KB_OUT10,          PIN(C, 5),  GPIO_KB_OUTPUT)
+GPIO(KB_OUT11,          PIN(C, 4),  GPIO_KB_OUTPUT)
+GPIO(KB_OUT12,          PIN(A, 13), GPIO_KB_OUTPUT)
+GPIO(POWER_LED,         PIN(A, 2),  GPIO_OUT_HIGH)
+GPIO(PMIC_PWRON,        PIN(A, 12), GPIO_OUT_LOW)
+GPIO(PMIC_RESET,        PIN(B, 3),  GPIO_OUT_LOW)
+GPIO(PMIC_SOURCE_PWREN, PIN(B, 10), GPIO_OUT_LOW)
+GPIO(PMIC_WARM_RESET_L, PIN(C, 3),  GPIO_ODR_HIGH)
+
+ALTERNATE(PIN_MASK(A, 0x00f0), 0, MODULE_SPI,  0)
+ALTERNATE(PIN_MASK(A, 0x0600), 1, MODULE_UART, 0)
+ALTERNATE(PIN_MASK(B, 0x00c0), 1, MODULE_I2C,  0)