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| author | Name <poornima.tom@intel.com> | 2020-07-22 16:05:51 +0530 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-10-07 22:34:30 +0000 |
| commit | a8dec10c9da00eca5284ee34246fdeadf1ba9179 (patch) | |
| tree | 3124d09cef8650f779fac35b8e3d721d07d26114 /board/jslrvp_ite/board.h | |
| parent | c96da499286bbe66e767db6768fb9b67057d13ea (diff) | |
| download | chrome-ec-a8dec10c9da00eca5284ee34246fdeadf1ba9179.tar.gz | |
intelrvp: Move board specific changes to respective board files
Move board specific GPIO definitions and TCPC configuration
from baseboard to JSL/TGL boards to accommodate changes in
MECC spec 0.9 vs 1.0.
BRANCH=None
BUG=b:169551130
TEST=make buildall -j
Signed-off-by: pandeyan <anshuman.pandey@intel.com>
Change-Id: I53a0545674f22e6cba05f777a4095909c231cfd2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435174
Commit-Queue: Poornima Tom <poornima.tom@intel.com>
Tested-by: Poornima Tom <poornima.tom@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
Diffstat (limited to 'board/jslrvp_ite/board.h')
| -rw-r--r-- | board/jslrvp_ite/board.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/board/jslrvp_ite/board.h b/board/jslrvp_ite/board.h index 2ac8afa8d9..4f88cd5a52 100644 --- a/board/jslrvp_ite/board.h +++ b/board/jslrvp_ite/board.h @@ -8,10 +8,17 @@ #ifndef __CROS_EC_BOARD_H #define __CROS_EC_BOARD_H +/* ITE EC variant */ +#define VARIANT_INTELRVP_EC_IT8320 + #define CONFIG_CHIPSET_JASPERLAKE #define GPIO_PG_EC_RSMRST_ODL GPIO_RSMRST_L_PGOOD #define GPIO_PCH_DSW_PWROK GPIO_EC_PCH_DSW_PWROK #define GPIO_PG_EC_ALL_SYS_PWRGD GPIO_ALL_SYS_PWRGD +#define CONFIG_BATTERY_PRESENT_GPIO GPIO_EC_BATT_PRES_L +#define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L +#define GPIO_BAT_LED_RED_L GPIO_BAT_LED_GREEN_L +#define GPIO_PWR_LED_WHITE_L GPIO_AC_LED_GREEN_L /* Fan features */ #define CONFIG_FANS 1 @@ -34,6 +41,10 @@ #define CONFIG_USB_PD_PORT_MAX_COUNT 2 #define DEDICATED_CHARGE_PORT 2 +/* USB PD config */ +#define CONFIG_USB_PD_TCPM_ITE_ON_CHIP +#define CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT 2 + /* USB MUX */ #define CONFIG_USB_MUX_ANX7440 |