diff options
author | Daisuke Nojiri <dnojiri@chromium.org> | 2018-10-22 11:26:29 -0700 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2018-10-27 11:02:35 -0700 |
commit | 8095c8c9cc84187ba938473930fefa872a67bc24 (patch) | |
tree | 8780f7002fd2500115cd9263f9789eb42b92e7cb /board/karma | |
parent | 7a11f1a08eff45253bfd9db8034793f06bb34759 (diff) | |
download | chrome-ec-8095c8c9cc84187ba938473930fefa872a67bc24.tar.gz |
Kalista: Create baseboard directory
This patch creates a baseboard directory for Kalista, derived
from Fizz.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b:116764443
BRANCH=none
TEST=make BOARD=karma
Change-Id: Ib8c9dfd56658fd8b6bd39a0a01e22a05dbed477b
Reviewed-on: https://chromium-review.googlesource.com/1298319
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: David Huang <David.Huang@quantatw.com>
Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-by: Vincent Wang <vwang@chromium.org>
Diffstat (limited to 'board/karma')
-rw-r--r-- | board/karma/board.h | 13 | ||||
-rw-r--r-- | board/karma/build.mk | 11 | ||||
-rw-r--r-- | board/karma/dev_key.pem | 39 | ||||
-rw-r--r-- | board/karma/ec.tasklist | 33 | ||||
-rw-r--r-- | board/karma/gpio.inc | 113 |
5 files changed, 209 insertions, 0 deletions
diff --git a/board/karma/board.h b/board/karma/board.h new file mode 100644 index 0000000000..372b18509b --- /dev/null +++ b/board/karma/board.h @@ -0,0 +1,13 @@ +/* Copyright 2018 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Karma board configuration */ + +#ifndef __CROS_EC_BOARD_H +#define __CROS_EC_BOARD_H + +#include "baseboard.h" + +#endif /* __CROS_EC_BOARD_H */ diff --git a/board/karma/build.mk b/board/karma/build.mk new file mode 100644 index 0000000000..05884cf221 --- /dev/null +++ b/board/karma/build.mk @@ -0,0 +1,11 @@ +# -*- makefile -*- +# Copyright 2018 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. +# +# Board specific files build +# + +CHIP:=npcx +CHIP_VARIANT:=npcx5m6g +BASEBOARD:=kalista diff --git a/board/karma/dev_key.pem b/board/karma/dev_key.pem new file mode 100644 index 0000000000..b72c787613 --- /dev/null +++ b/board/karma/dev_key.pem @@ -0,0 +1,39 @@ +-----BEGIN RSA PRIVATE KEY----- +MIIG4gIBAAKCAYEAseZZZlXXDP+KrjqV+XhP0ZgPlU5mX4GCm27yzTqcKiFWLlHZ +3f8seGG0lKNiL7WvHim8uSEDaPbp2us4uaJ6nTHEpbSGi2QVp90tE3aJG34HyKlg +jcaE1r/0n6ynG/bf0Xx4O63Plp3Czi3TBYW49vT6+T/Jyfl2JpGQ9KNcD0umafsv +uaEmdrLGrzjN8w1mFZfwscFkfVDh0cdiFNJ+UkTSpO9/yPapXbo4/lOMwdO9xILF +cEZV9I7K7lBSvQ5Uep+w0SqNPTh2cGhoeEeDyH+Ce0LA8H7ZwbVnwLe1RswF9Wek +uzqp9lMSNkkwMtTkumTuJLLGJX9rc0MVQTKgNV8wIzizf5lkCCBCJLf7aRBaeWCJ +cXjKiavSPOZXDcnqCWqRJT3jN4ibAsU1GQtqLa8pTAi2wkE0fjuvAWK3NYuvpukg +qNq2LI+BJkF4+dCZoeB1PDNyFNzdOFvkxj2+ImS3DLlPYVng4vHsTK1HRUUpL5Ag +jjfMhMs4NC7HMOCTAgEDAoIBgHaZkO7j5LNVBx7RuVD63+EQCmOJmZUBAbz0od4n +EsbA5B7hO+lUyFBBIw3CQXUjyhQb0yYWAkX58Tyc0HvBpxN2gxkjBFztY8U+Hgz5 +sLz+r9sblbPZreR/+GpzGhKklTZS+tJz37m+gd7JN1kD0KSjUft/29v7pBm2YKMX +krTdGZv8ynvAxE8h2col3qII7rkP9cvWQv416+EvlriMVDbYjG30/9tPG5PRe1Q3 +syvifoMB2PWEOU20h0mK4dNe4d7E96s1Q+RTmTUtyipxUp6d4PIufAjMtM8yfkb0 +/0z81IsWQ0NOhefrMAi8TEcDkbyNSBPqHqbqH2FosFWo2cU3r6TXv2LdvFzc5BA+ +U6c+fXz7BDjv+NT3Bh98whKvTdJYcIgSg6vqzW7ZWJWWllZQtpJnQccIq4sPaL4S +osFg8jd1kcbjVakCN0wYtfvMa/+WBZNNsZLUHoeIJvO7qnT7VKzhceoKHCJCMxNR +Ypu5eELxCwebTXiImDqmFsKIawKBwQDpDjff6eatHbjmGV1elTyV5MLi95Tc0T7P +FZHC1KLXkA/mEuXjAGfoZuLB5a3WmrA8r8fWNZoKV+0RBKIs3at1JFxZn9YiA0Hy +5qmnYkXjMaY4p5AyO3eJsc2kbsh9r0cy2cb5GdwFDApeoVICoQh+dW9FpvIS+9AF +0DVc2/Rg//cuXLlCMonF+PZVmDxRNhjBvwvRjxeowiu2ntI4sa83nHMhXI/RfvV4 +xcSng8gSIvabUmunDcPKvqO3rnpHzVECgcEAw2oFcHDAuZ1Xuopb2ghLRK3uLQVy +BnqLu9QYk3OTe8C3PrNZ80R5MgtnZ0kP8bTZ4uE6MJ3+IMhPUCFqk9euGGdMUlU+ +SUmHie5CZPg4CwD4BUBy6dVdwId7aTxrdBOuGwwhYAhBsJxcfd3eNgiALcCoKsbi +BLhjJ9Rch2rOsnpNJVwMvFMr6RM33oQrrufe4MBhDa/QD9yDtnDYH/KPO09E6AqU +sMvBNsjbCC9rSYv+L9QkW8EUhT+wJIcqxUajAoHBAJtez+qb7x4T0JlmPj8OKGPt +10H6Yz3g1IoOYSyNweUKtUQMmUIARUWZ7IFDyTm8dX3KhTl5EVw6ngtYbB3pHPjC +6Du/5Bas1qHvG8TsLpd2btBvtXbST7EhM8L0hakfhMyRL1C76ANdXD8WNqxrWv74 +9NkZ9rdSiq6Kzj3n+ECqpMmTJiwhsS6l+Y5lfYt5ZdZ/XTZfZRssHSRp4XshH3po +TMDoX+D/TlCD2G+tMAwXTxI28m9egocpwnp0UYUziwKBwQCCRq5K9dXRE4/RsZKR +WtzYc/QeA6FZpwfSjWW3omJSgHopzOaiLaYhXO+aMLVLzeaXQNF1vqlrMDTgFkcN +OnQQRN2MONQw26+xSYGYpXqyAKVY1aHxOOkrBPzw0vJNYnQSCBZABYEgaD2pPpQk +BarJKxrHL0FYeuzFOD2vnInMUYjDkrMoN3KbYiU/AsfJ7+nrKutedTVf6FfO9eVq +obTSNNiasbh13St52zywH5zbsql1OBg9K2MDf8rDBMcuLxcCgcBfM9FWZivdG2tJ +5REvL0vPAQfcjVi4HUHvnaCuwMYEuF5T2Xf9P8d8ZflfWHaGlkl/qPvE897fns2l +PZvvhRnr9GlHKt940ZOTI2v+hjlwcHGAAQc+p7BcKeUYLChwhVK/cZ9f6ZCotZNh +543ecG4KZiJaqBZ/mDRaW7Py0w6lbOAzprrHF3ChvQ6VAllajoWx4CeINRcxX2vP +bAPZxvt0gwpoHtUAsZo/bKEF0sM5qM/fK43gH5KhJeunq/xHO7E= +-----END RSA PRIVATE KEY----- diff --git a/board/karma/ec.tasklist b/board/karma/ec.tasklist new file mode 100644 index 0000000000..21e9ccb7c5 --- /dev/null +++ b/board/karma/ec.tasklist @@ -0,0 +1,33 @@ +/* Copyright 2018 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* + * List of enabled tasks in the priority order + * + * The first one has the lowest priority. + * + * For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and + * TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries, + * where : + * 'n' in the name of the task + * 'r' in the main routine of the task + * 'd' in an opaque parameter passed to the routine at startup + * 's' is the stack size in bytes; must be a multiple of 8 + * + * For USB PD tasks, IDs must be in consecutive order and correspond to + * the port which they are for. See TASK_ID_TO_PD_PORT() macro. + */ + +#define CONFIG_TASK_LIST \ + TASK_ALWAYS(HOOKS, hook_task, NULL, 2048) \ + /* Larger stack for RW verification (i.e. sha256, rsa) */ \ + TASK_NOTEST(CHIPSET, chipset_task, NULL, TASK_STACK_SIZE) \ + TASK_NOTEST(PDCMD, pd_command_task, NULL, TASK_STACK_SIZE) \ + TASK_ALWAYS(HOSTCMD, host_command_task, NULL, 2048) \ + TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C0, pd_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, TASK_STACK_SIZE) \ + TASK_ALWAYS(CEC, cec_task, NULL, TASK_STACK_SIZE) diff --git a/board/karma/gpio.inc b/board/karma/gpio.inc new file mode 100644 index 0000000000..efeedbce61 --- /dev/null +++ b/board/karma/gpio.inc @@ -0,0 +1,113 @@ +/* -*- mode:c -*- + * + * Copyright 2018 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Declare symbolic names for all the GPIOs that we care about. + * Note: Those with interrupt handlers must be declared first. */ + +GPIO_INT(USB_C0_PD_INT_ODL, PIN(3, 7), GPIO_INT_FALLING | GPIO_PULL_UP, tcpc_alert_event) +GPIO_INT(AC_PRESENT, PIN(C, 1), GPIO_INT_BOTH, extpower_interrupt) +GPIO_INT(POWER_BUTTON_L, PIN(0, 4), GPIO_INT_BOTH | GPIO_PULL_UP, power_button_interrupt) /* MECH_PWR_BTN_ODL */ + +GPIO_INT(PCH_SLP_S0_L, PIN(7, 5), GPIO_INT_BOTH, power_signal_interrupt) +/* Use VW signals instead of GPIOs */ +#ifndef CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS +GPIO_INT(PCH_SLP_S3_L, PIN(7, 3), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(PCH_SLP_S4_L, PIN(8, 6), GPIO_INT_BOTH, power_signal_interrupt) +#endif +GPIO_INT(PCH_SLP_SUS_L, PIN(6, 2), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(RSMRST_L_PGOOD, PIN(B, 0), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(PMIC_DPWROK, PIN(C, 7), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(WP_L, PIN(9, 3), GPIO_INT_BOTH, switch_interrupt) +GPIO_INT(ADP_IN_L, PIN(C, 5), GPIO_INT_BOTH | GPIO_PULL_UP, adp_in) /* Low: BJ detected */ +GPIO_INT(USB_C0_VBUS_WAKE_L, PIN(9, 7), GPIO_INT_BOTH | GPIO_PULL_UP, vbus0_evt) +GPIO_INT(RECOVERY_L, PIN(8, 2), GPIO_INT_BOTH, button_interrupt) /* Recovery button */ +GPIO(PCH_RTCRST, PIN(E, 7), GPIO_OUT_LOW) /* RTCRST# to SOC */ +GPIO(WLAN_OFF_L, PIN(7, 2), GPIO_OUT_LOW) /* Disable WLAN */ +GPIO(PP3300_DX_WLAN, PIN(A, 7), GPIO_OUT_LOW) /* Enable WLAN 3.3V Power */ +GPIO(CPU_PROCHOT, PIN(8, 1), GPIO_OUT_HIGH) /* PROCHOT# to SOC */ +GPIO(PCH_ACPRESENT, PIN(5, 0), GPIO_ODR_LOW) /* ACOK to SOC */ +GPIO(PCH_WAKE_L, PIN(A, 3), GPIO_ODR_HIGH) /* Wake SOC */ +GPIO(PCH_RSMRST_L, PIN(7, 0), GPIO_OUT_LOW) /* RSMRST# to SOC */ +GPIO(PCH_PWRBTN_L, PIN(7, 4), GPIO_ODR_HIGH) /* Power Button to SOC */ +GPIO(EC_PLATFORM_RST, PIN(4, 5), GPIO_OUT_LOW) /* EC Reset to LDO_EN */ +GPIO(SYS_RESET_L, PIN(6, 1), GPIO_ODR_HIGH) /* Cold Reset to SOC */ +GPIO(PMIC_SLP_SUS_L, PIN(8, 5), GPIO_OUT_LOW) /* SLP_SUS# to PMIC */ +GPIO(CCD_MODE_ODL, PIN(6, 3), GPIO_INPUT) /* Case Closed Debug Mode */ +GPIO(EC_HAVEN_RESET_ODL, PIN(0, 2), GPIO_ODR_HIGH) /* H1 Reset */ +GPIO(ENTERING_RW, PIN(7, 6), GPIO_OUTPUT) /* EC Entering RW */ +GPIO(PMIC_INT_L, PIN(6, 0), GPIO_INPUT) /* PMIC interrupt */ +GPIO(TYPE_C_60W, PIN(3, 3), GPIO_OUTPUT | GPIO_PULL_DOWN) +GPIO(TYPE_C_65W, PIN(3, 4), GPIO_OUTPUT | GPIO_PULL_DOWN) +GPIO(TYPE_C_87W, PIN(4, 4), GPIO_OUTPUT | GPIO_PULL_DOWN) +GPIO(POWER_RATE, PIN(7, 1), GPIO_INPUT) /* High: i3/5/7. Low: Celeron */ + +/* Fizz specific pins */ +GPIO(LAN_PWR_EN, PIN(8, 3), GPIO_OUT_HIGH) /* Ethernet power enabled */ + +GPIO(PP5000_DX_NFC, PIN(1, 5), GPIO_OUTPUT) + +GPIO(PP3300_DX_CAM, PIN(1, 0), GPIO_OUT_HIGH) +GPIO(CAM_PMIC_RST_L, PIN(0, 7), GPIO_INPUT) + +GPIO(WLAN_PE_RST, PIN(1, 2), GPIO_OUTPUT) +GPIO(PP3300_DX_LTE, PIN(0, 5), GPIO_OUT_LOW) +GPIO(PP3300_DX_BASE, PIN(1, 1), GPIO_OUT_LOW) + +/* I2C pins - these will be reconfigured for alternate function below */ +GPIO(I2C0_0_SCL, PIN(B, 5), GPIO_INPUT) /* EC_I2C_USB_C0_PD_SCL */ +GPIO(I2C0_0_SDA, PIN(B, 4), GPIO_INPUT) /* EC_I2C_USB_C0_PD_SDA */ +GPIO(I2C0_1_SCL, PIN(B, 3), GPIO_INPUT) /* EC_I2C_EEPROM_SCL */ +GPIO(I2C0_1_SDA, PIN(B, 2), GPIO_INPUT) /* EC_I2C_EEPROM_SDA */ +GPIO(I2C1_SCL, PIN(9, 0), GPIO_INPUT) /* EC_I2C_BAT_SCL */ +GPIO(I2C1_SDA, PIN(8, 7), GPIO_INPUT) /* EC_I2C_BAT_SDA */ +GPIO(I2C2_SCL, PIN(9, 2), GPIO_INPUT) /* EC_ROP_I2C_CLK */ +GPIO(I2C2_SDA, PIN(9, 1), GPIO_INPUT) /* EC_ROP_I2C_SDA */ +GPIO(I2C3_SCL, PIN(D, 1), GPIO_INPUT) /* EC_THEM_CLK */ +GPIO(I2C3_SDA, PIN(D, 0), GPIO_INPUT) /* EC_THEM_SDA */ + +/* 5V enables: INPUT=1.5A, OUT_LOW=OFF, OUT_HIGH=3A */ +GPIO(USB_C0_5V_EN, PIN(4, 2), GPIO_OUT_LOW | GPIO_PULL_UP) /* C0 5V Enable */ +GPIO(USB_C0_CHARGE_L, PIN(C, 0), GPIO_OUT_LOW) /* C0 Charge enable */ +GPIO(AC_JACK_CHARGE_L, PIN(C, 3), GPIO_OUT_LOW) /* AC jack charge enable */ +GPIO(USB_C0_PD_RST_ODL, PIN(0, 3), GPIO_OUT_LOW) /* C0 PD Reset */ +GPIO(USB_C0_DP_HPD, PIN(9, 4), GPIO_INPUT) /* C0 DP Hotplug Detect */ +GPIO(USB_C0_TCPC_PWR, PIN(8, 4), GPIO_OUT_LOW) /* Enable C0 TCPC Power */ +GPIO(FAN_PWR_EN, PIN(9, 5), GPIO_OUT_HIGH) /* Fan power */ +GPIO(USB1_ENABLE, PIN(3, 2), GPIO_OUT_LOW) /* Rear port, bottom */ +GPIO(USB2_ENABLE, PIN(C, 6), GPIO_OUT_LOW) /* Rear port, top */ +GPIO(USB3_ENABLE, PIN(A, 1), GPIO_OUT_LOW) /* Rear port, single */ +GPIO(USB4_ENABLE, PIN(0, 0), GPIO_OUT_LOW) /* Front port 1 */ +GPIO(USB5_ENABLE, PIN(B, 1), GPIO_OUT_LOW) /* Front port 2 */ +GPIO(USB_A_CHARGE_EN_L, PIN(A, 5), GPIO_OUT_LOW) + +GPIO(CEC_OUT, PIN(3, 6), GPIO_OUT_HIGH | GPIO_OPEN_DRAIN) +GPIO(CEC_IN, PIN(4, 0), GPIO_INPUT) +GPIO(CEC_PULL_UP, PIN(D, 3), GPIO_OUT_HIGH) + +/* Board ID */ +GPIO(BOARD_VERSION1, PIN(C, 4), GPIO_INPUT) /* Board ID bit0 */ +GPIO(BOARD_VERSION2, PIN(C, 2), GPIO_INPUT) /* Board ID bit1 */ +GPIO(BOARD_VERSION3, PIN(0, 1), GPIO_INPUT) /* Board ID bit2 */ + +/* Test points */ +GPIO(TP248, PIN(5, 7), GPIO_INPUT | GPIO_PULL_UP) /* EC_GPIO57 */ +GPIO(TP249, PIN(6, 6), GPIO_INPUT | GPIO_PULL_UP) /* EC_GPO66_ARM_L */ +GPIO(TP250, PIN(3, 5), GPIO_INPUT | GPIO_PULL_UP) /* EC_GPIO35_TEST_L */ + +/* Alternate functions GPIO definitions */ +ALTERNATE(PIN_MASK(6, 0x30), 1, MODULE_UART, 0) /* GPIO64-65 */ /* UART from EC to Servo */ +ALTERNATE(PIN_MASK(8, 0x80), 1, MODULE_I2C, 0) /* GPIO87 */ /* EC_I2C1_3V3_SDA */ +ALTERNATE(PIN_MASK(9, 0x01), 1, MODULE_I2C, 0) /* GPIO90 */ /* EC_I2C1_3V3_SCL */ +ALTERNATE(PIN_MASK(9, 0x06), 1, MODULE_I2C, 0) /* GPIO91-92 */ /* EC_I2C2_PMIC_3V3_SDA/SCL */ +ALTERNATE(PIN_MASK(A, 0x40), 1, MODULE_PWM, 0) /* GPIOA6 */ /* TACH2 */ +ALTERNATE(PIN_MASK(B, 0x30), 1, MODULE_I2C, 0) /* GPIOB4-B5 */ /* EC_I2C0_0_USBC_3V3_SDA/SCL */ +ALTERNATE(PIN_MASK(B, 0x40), 1, MODULE_PWM, 0) /* GPIOB6 */ /* EC_FAN_PWM */ +ALTERNATE(PIN_MASK(B, 0x0C), 1, MODULE_I2C, 0) /* GPOPB2-B3 */ /* EC_I2C0_1_3V3_SDA/SCL */ +ALTERNATE(PIN_MASK(D, 0x03), 1, MODULE_I2C, 0) /* GPIOD0-D1 */ /* EC_I2C3_SENSOR_1V8_SDA/SCL */ +/* Alternate functions for LED PWM */ +ALTERNATE(PIN_MASK(8, 0x01), 1, MODULE_PWM, 0) /* GPIO80 PWM3 Red*/ +ALTERNATE(PIN_MASK(B, 0x80), 1, MODULE_PWM, 0) /* GPOB7 PWM5 Green*/ |