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| author | Nicolas Boichat <drinkcat@chromium.org> | 2019-02-27 15:11:39 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2019-03-16 20:31:35 -0700 |
| commit | 4435080f07a8e11560bd2b39ee23a2c7d945edf5 (patch) | |
| tree | c2f52daf0b42654c3a8f9755dbe1e7206aec00f9 /board/kukui | |
| parent | 7b686a1f116d867c00516b6ceed91d5cb3e17398 (diff) | |
| download | chrome-ec-4435080f07a8e11560bd2b39ee23a2c7d945edf5.tar.gz | |
kukui: Pulse PMIC_FORCE_RESET_ODL on external reset
If the reset cause is external, it is wise to reset the PMIC
registers, which can be achieved by pulsing the force reset signal
to PMIC.
We found in previous experiments that 5ms is often enough to reset
the PMIC, but that occasionally the PMIC would auto-restart if
the pulse is so short (so we pulse for 10s when we force shutdown
the AP).
Here, we pulse for 100ms, which is an acceptable delay in these
situations, and hopefully long enough to recover from bad PMIC
settings.
BRANCH=none
BUG=b:123154929
TEST=Boot kukui, external reset cause the PMIC to power cycle,
measured using PMIC_EC_RESETB.
TEST=AP normal reboot does not cause such a reset.
TEST=See that most PMIC registers are reset after force reset
is used (see bug).
Change-Id: Iddbc20506890b3f904c36642515a0502d90462a3
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1490799
Reviewed-by: Yilun Lin <yllin@chromium.org>
Diffstat (limited to 'board/kukui')
| -rw-r--r-- | board/kukui/board.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/board/kukui/board.c b/board/kukui/board.c index cd42a3b940..f0a32d1583 100644 --- a/board/kukui/board.c +++ b/board/kukui/board.c @@ -207,6 +207,13 @@ int pd_snk_is_vbus_provided(int port) static void board_init(void) { + /* If the reset cause is external, pulse PMIC force reset. */ + if (system_get_reset_flags() == RESET_FLAG_RESET_PIN) { + gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 0); + msleep(100); + gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 1); + } + /* Set SPI1 PB13/14/15 pins to high speed */ STM32_GPIO_OSPEEDR(GPIO_B) |= 0xfc000000; |