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author | Tommy Chung <tommy.chung@quanta.corp-partner.google.com> | 2021-02-25 17:00:09 +0800 |
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committer | Commit Bot <commit-bot@chromium.org> | 2021-02-26 21:01:23 +0000 |
commit | 85e87508d83b296230b79778773e63b317626880 (patch) | |
tree | 56a690d38daa7f143527703cf1776049dcd471ed /board/lantis/board.c | |
parent | 028f15648f2459b89e0287f2ac2718273c122ad8 (diff) | |
download | chrome-ec-85e87508d83b296230b79778773e63b317626880.tar.gz |
lantis: Add GPIO_EC_ENTERING_RW2
This commit syncs with crrev.com/c/2719104 on lantis.
BUG=b:181085178
BRANCH=dedede
TEST=Build and flash lantis, verify it boots.
Signed-off-by: Tommy Chung <tommy.chung@quanta.corp-partner.google.com>
Change-Id: I33f44dbbe4959b96e5805d7f2833c9fa20984537
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2719779
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Diffstat (limited to 'board/lantis/board.c')
-rw-r--r-- | board/lantis/board.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/board/lantis/board.c b/board/lantis/board.c index 779dd5f9d2..ed2aea981d 100644 --- a/board/lantis/board.c +++ b/board/lantis/board.c @@ -470,6 +470,21 @@ __override void board_ocpc_init(struct ocpc_data *ocpc) ocpc->chg_flags[CHARGER_SECONDARY] |= OCPC_NO_ISYS_MEAS_CAP; } +__override void board_pulse_entering_rw(void) +{ + /* + * On the ITE variants, the EC_ENTERING_RW signal was connected to a pin + * which is active high by default. This causes Cr50 to think that the + * EC has jumped to its RW image even though this may not be the case. + * The pin is changed to GPIO_EC_ENTERING_RW2. + */ + gpio_set_level(GPIO_EC_ENTERING_RW, 1); + gpio_set_level(GPIO_EC_ENTERING_RW2, 1); + usleep(MSEC); + gpio_set_level(GPIO_EC_ENTERING_RW, 0); + gpio_set_level(GPIO_EC_ENTERING_RW2, 0); +} + void board_reset_pd_mcu(void) { /* |