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| author | Ryan Zhang <Ryan.Zhang@quantatw.com> | 2015-12-02 21:07:53 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2015-12-06 19:00:51 -0800 |
| commit | 5c8edccb941bf7fa76fac7a6cf3b16c1c0765577 (patch) | |
| tree | 0f3c8b9b70955f9ec3b70baf40f1c32fd9e17788 /board/lars_pd/board.h | |
| parent | a9d7417951efb95cb2c076791b0bea6d4e4d62e2 (diff) | |
| download | chrome-ec-5c8edccb941bf7fa76fac7a6cf3b16c1c0765577.tar.gz | |
Lars: Remove second port of PD firmware
two port PD will keep interrupt low, and cause
EC.PDCMD task stuck with exchange status loop before
entering task-while-loop
BUG=chrome-os-partner:48232
BRANCH=lars
TEST=`make BOARD=lars -j`, OS can boot up normally
Change-Id: I493c6d02170c731af430f28abf8ade38b47aff0f
Signed-off-by: Ryan Zhang <Ryan.Zhang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/315362
Reviewed-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'board/lars_pd/board.h')
| -rw-r--r-- | board/lars_pd/board.h | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/board/lars_pd/board.h b/board/lars_pd/board.h index 6831979149..8069ec89f7 100644 --- a/board/lars_pd/board.h +++ b/board/lars_pd/board.h @@ -61,7 +61,7 @@ #define CONFIG_UART_TX_BUF_SIZE 128 #define CONFIG_USB_PD_DUAL_ROLE #define CONFIG_USB_PD_INTERNAL_COMP -#define CONFIG_USB_PD_PORT_COUNT 2 +#define CONFIG_USB_PD_PORT_COUNT 1 #define CONFIG_USB_PD_TCPC #define CONFIG_USB_PD_TCPM_VBUS #define CONFIG_USBC_VCONN @@ -104,10 +104,8 @@ /* ADC signal */ enum adc_channel { - ADC_C1_CC1_PD = 0, - ADC_C0_CC1_PD, + ADC_C0_CC1_PD = 0, ADC_C0_CC2_PD, - ADC_C1_CC2_PD, /* Number of ADC channels */ ADC_CH_COUNT }; |