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| author | Randall Spangler <rspangler@chromium.org> | 2012-01-13 15:53:29 -0800 |
|---|---|---|
| committer | Randall Spangler <rspangler@chromium.org> | 2012-01-17 12:19:47 -0800 |
| commit | 002bc4278bcfe26ae9c3b6fb5cdd3ddc2d07403e (patch) | |
| tree | bcffd121555801ba37cbaa476648fbb2a8ae635b /board/link/board.c | |
| parent | ff3ebed7a8970e11f4169390469e4bb1d67543cc (diff) | |
| download | chrome-ec-002bc4278bcfe26ae9c3b6fb5cdd3ddc2d07403e.tar.gz | |
Add x86 power state machine
For bringup, this powers on the x86 unconditionally.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7528
TEST=none
Change-Id: Ib23e56d38ab42f8d8a4dbd1ba9dce12f0c3eeec9
Diffstat (limited to 'board/link/board.c')
| -rw-r--r-- | board/link/board.c | 49 |
1 files changed, 33 insertions, 16 deletions
diff --git a/board/link/board.c b/board/link/board.c index 1b0b5a69cb..e5f9651382 100644 --- a/board/link/board.c +++ b/board/link/board.c @@ -9,6 +9,7 @@ #include "power_button.h" #include "registers.h" #include "util.h" +#include "x86_power.h" /* GPIO signal list. Must match order from enum gpio_signal. */ @@ -22,22 +23,38 @@ const struct gpio_info gpio_list[GPIO_COUNT] = { {"POWER_ONEWIRE", LM4_GPIO_H, (1<<2), 0, NULL}, {"THERMAL_DATA_READYn", LM4_GPIO_B, (1<<4), 0, NULL}, {"AC_PRESENT", LM4_GPIO_H, (1<<3), 0, NULL}, - {"PCH_BKLTEN", LM4_GPIO_J, (1<<3), 0, NULL}, - {"PCH_SLP_An", LM4_GPIO_G, (1<<5), 0, NULL}, - {"PCH_SLP_ME_CSW_DEVn", LM4_GPIO_G, (1<<4), 0, NULL}, - {"PCH_SLP_S3n", LM4_GPIO_J, (1<<0), 0, NULL}, - {"PCH_SLP_S4n", LM4_GPIO_J, (1<<1), 0, NULL}, - {"PCH_SLP_S5n", LM4_GPIO_J, (1<<2), 0, NULL}, - {"PCH_SLP_SUSn", LM4_GPIO_G, (1<<3), 0, NULL}, - {"PCH_SUSWARNn", LM4_GPIO_G, (1<<2), 0, NULL}, - {"PGOOD_1_5V_DDR", LM4_GPIO_K, (1<<0), 0, NULL}, - {"PGOOD_1_5V_PCH", LM4_GPIO_K, (1<<1), 0, NULL}, - {"PGOOD_1_8VS", LM4_GPIO_K, (1<<3), 0, NULL}, - {"PGOOD_5VALW", LM4_GPIO_H, (1<<0), 0, NULL}, - {"PGOOD_CPU_CORE", LM4_GPIO_M, (1<<3), 0, NULL}, - {"PGOOD_VCCP", LM4_GPIO_K, (1<<2), 0, NULL}, - {"PGOOD_VCCSA", LM4_GPIO_H, (1<<1), 0, NULL}, - {"PGOOD_VGFX_CORE", LM4_GPIO_D, (1<<2), 0, NULL}, + {"PCH_BKLTEN", LM4_GPIO_J, (1<<3), GPIO_INT_BOTH, + x86_power_interrupt}, + {"PCH_SLP_An", LM4_GPIO_G, (1<<5), GPIO_INT_BOTH, + x86_power_interrupt}, + {"PCH_SLP_ME_CSW_DEVn", LM4_GPIO_G, (1<<4), GPIO_INT_BOTH, + x86_power_interrupt}, + {"PCH_SLP_S3n", LM4_GPIO_J, (1<<0), GPIO_INT_BOTH, + x86_power_interrupt}, + {"PCH_SLP_S4n", LM4_GPIO_J, (1<<1), GPIO_INT_BOTH, + x86_power_interrupt}, + {"PCH_SLP_S5n", LM4_GPIO_J, (1<<2), GPIO_INT_BOTH, + x86_power_interrupt}, + {"PCH_SLP_SUSn", LM4_GPIO_G, (1<<3), GPIO_INT_BOTH, + x86_power_interrupt}, + {"PCH_SUSWARNn", LM4_GPIO_G, (1<<2), GPIO_INT_BOTH, + x86_power_interrupt}, + {"PGOOD_1_5V_DDR", LM4_GPIO_K, (1<<0), GPIO_INT_BOTH, + x86_power_interrupt}, + {"PGOOD_1_5V_PCH", LM4_GPIO_K, (1<<1), GPIO_INT_BOTH, + x86_power_interrupt}, + {"PGOOD_1_8VS", LM4_GPIO_K, (1<<3), GPIO_INT_BOTH, + x86_power_interrupt}, + {"PGOOD_5VALW", LM4_GPIO_H, (1<<0), GPIO_INT_BOTH, + x86_power_interrupt}, + {"PGOOD_CPU_CORE", LM4_GPIO_M, (1<<3), GPIO_INT_BOTH, + x86_power_interrupt}, + {"PGOOD_VCCP", LM4_GPIO_K, (1<<2), GPIO_INT_BOTH, + x86_power_interrupt}, + {"PGOOD_VCCSA", LM4_GPIO_H, (1<<1), GPIO_INT_BOTH, + x86_power_interrupt}, + {"PGOOD_VGFX_CORE", LM4_GPIO_D, (1<<2), GPIO_INT_BOTH, + x86_power_interrupt}, {"RECOVERYn", LM4_GPIO_H, (1<<7), 0, NULL}, {"USB1_STATUSn", LM4_GPIO_E, (1<<7), 0, NULL}, {"USB2_STATUSn", LM4_GPIO_E, (1<<1), 0, NULL}, |