Clean up configuring GPIO alternate functions

GPIO alternate functions used to be configured throughout the code,
which made it hard to tell which ones you needed to configure yourself
in board.c.  It also sometimes (chip/lm4/i2c.c) led to GPIOs being
configured as alternate functions even if they weren't used on a given
board.

With this change, every board has a table in board.c which lists ALL
GPIOs which have alternate functions.  This is now the only place
where alternate functions are configured.  Each module then calls
gpio_init_module() to set up its GPIOs.

This also fixes a bug where gpio_set_flags() ignored most of the flags
passed to it (only direction and level were actually used).

On stm32f, gpio_set_alternate() does not exist, and pins are
configured via direct register writes from board.c.  Rather than
attempt to change that in the same CL, I've stubbed out
gpio_set_alternate() for stm32f, and will fix the register writes in a
follow-up CL.

BUG=chrome-os-partner:21618
BRANCH=peppy (fixes I2C1 being initialized even though those pins are used
       for other things)
TEST=boot link, falco, pit, spring

Change-Id: I40f47025d8f767e0723c6b40c80413af9ba8deba
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/64400

1 files changed, 19 insertions, 18 deletions

diff --git a/board/link/board.c b/board/link/board.c
index cfcc695ecd..1eac758978 100644
--- a/board/link/board.c
+++ b/board/link/board.c
@@ -125,6 +125,25 @@ const struct gpio_info gpio_list[] = {
 };
 BUILD_ASSERT(ARRAY_SIZE(gpio_list) == GPIO_COUNT);
 
+/* Pins with alternate functions */
+const struct gpio_alt_func gpio_alt_funcs[] = {
+	{GPIO_A, 0x03, 1, MODULE_UART},			/* UART0 */
+	{GPIO_A, 0x40, 3, MODULE_I2C},			/* I2C1 SCL */
+	{GPIO_A, 0x80, 3, MODULE_I2C, GPIO_OPEN_DRAIN},	/* I2C1 SDA */
+	{GPIO_B, 0x04, 3, MODULE_I2C},			/* I2C0 SCL */
+	{GPIO_B, 0x08, 3, MODULE_I2C, GPIO_OPEN_DRAIN},	/* I2C0 SDA */
+	{GPIO_B, 0x40, 3, MODULE_I2C},			/* I2C5 SCL */
+	{GPIO_B, 0x80, 3, MODULE_I2C, GPIO_OPEN_DRAIN},	/* I2C5 SDA */
+	{GPIO_C, 0x30, 2, MODULE_UART},			/* UART1 */
+	{GPIO_J, 0x40, 1, MODULE_PECI},			/* PECI Tx */
+	{GPIO_J, 0x80, 0, MODULE_PECI, GPIO_ANALOG},	/* PECI Rx */
+	{GPIO_K, 0x40, 1, MODULE_PWM_KBLIGHT},		/* Fan1 PWM */
+	{GPIO_L, 0x3f, 15, MODULE_LPC},			/* LPC */
+	{GPIO_M, 0x33, 15, MODULE_LPC},			/* LPC */
+	{GPIO_M, 0xc0, 1, MODULE_PWM_FAN},		/* Fan0 PWM/tach */
+};
+const int gpio_alt_funcs_count = ARRAY_SIZE(gpio_alt_funcs);
+
 /* x86 signal list.  Must match order of enum x86_signal. */
 const struct x86_signal_info x86_signal_list[] = {
 	{GPIO_PGOOD_5VALW,		1, "PGOOD_5VALW"},
@@ -217,15 +236,6 @@ struct keyboard_scan_config keyscan_config = {
 };
 
 /**
- * Configure the GPIOs for the pwm module.
- */
-void configure_fan_gpios(void)
-{
-	/* PM6:7 alternate function 1 = channel 0 PWM/tach */
-	gpio_set_alternate_function(LM4_GPIO_M, 0xc0, 1);
-}
-
-/**
  * Perform necessary actions on host events.
  */
 void board_process_wake_events(uint32_t active_wake_events)
@@ -236,12 +246,3 @@ void board_process_wake_events(uint32_t active_wake_events)
 	else
 		gpio_set_level(GPIO_PCH_WAKE_L, 1);
 }
-
-/**
- * Configure the GPIOs for the pwm module.
- */
-void configure_kblight_gpios(void)
-{
-	/* PK6 alternate function 1 = channel 1 PWM */
-	gpio_set_alternate_function(LM4_GPIO_K, 0x40, 1);
-}