diff options
author | Jett Rink <jettrink@chromium.org> | 2018-05-21 12:01:40 -0600 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2018-05-23 09:13:49 -0700 |
commit | 4d23d995c3a915cdcd2129b382c6f276e159aa44 (patch) | |
tree | 05939f2fa7aaccc647d7d4ff175445caf23a8d7d /board/mchpevb1 | |
parent | 11bd4c0f4d11357ab830982d7dec164813c886dd (diff) | |
download | chrome-ec-4d23d995c3a915cdcd2129b382c6f276e159aa44.tar.gz |
espi: rename remaining eSPI options
Change prefix from CONFIG_ESPI to CONFIG_HOSTCMD_ESPI for consistency.
BRANCH=none
BUG=chromium:818804
TEST=Full stack builds and works on yorp (espi) and grunt (lpc)
Change-Id: I8b6e7eea515d14a0ba9030647cec738d95aea587
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1067513
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'board/mchpevb1')
-rw-r--r-- | board/mchpevb1/board.h | 10 | ||||
-rw-r--r-- | board/mchpevb1/gpio.inc | 2 |
2 files changed, 6 insertions, 6 deletions
diff --git a/board/mchpevb1/board.h b/board/mchpevb1/board.h index 4b7de96bd8..2683d980be 100644 --- a/board/mchpevb1/board.h +++ b/board/mchpevb1/board.h @@ -100,7 +100,7 @@ * Values in MHz are 20, 25, 33, 50, and 66 */ /* KBL + EVB fly-wire hook up only supports 20MHz */ -#define CONFIG_ESPI_EC_MAX_FREQ 20 +#define CONFIG_HOSTCMD_ESPI_EC_MAX_FREQ 20 /* * EC eSPI slave advertises IO lanes @@ -110,7 +110,7 @@ * 3 = Single, Dual, and Quad */ /* KBL + EVB fly-wire hook up only support Single mode */ -#define CONFIG_ESPI_EC_MODE 0 +#define CONFIG_HOSTCMD_ESPI_EC_MODE 0 /* * Bit map of eSPI channels EC advertises @@ -119,13 +119,13 @@ * bit[2] = 1 OOB channel * bit[3] = 1 Flash channel */ -#define CONFIG_ESPI_EC_CHAN_BITMAP 0x0F +#define CONFIG_HOSTCMD_ESPI_EC_CHAN_BITMAP 0x0F /* * MEC17xx EVB + KBL RVP3 board uses eSPI default of * Platform Reset being a virtual wire. */ -#define CONFIG_ESPI_PLTRST_IS_VWIRE +#define CONFIG_HOSTCMD_ESPI_PLTRST_IS_VWIRE #define CONFIG_MCHP_ESPI_VW_SAVE_ON_SLEEP @@ -172,7 +172,7 @@ #define CONFIG_CHIPSET_RESET_HOOK #define CONFIG_HOSTCMD_ESPI -#define CONFIG_ESPI_VW_SIGNALS +#define CONFIG_HOSTCMD_ESPI_VW_SIGNALS #define CONFIG_CLOCK_CRYSTAL #define CONFIG_EXTPOWER_GPIO diff --git a/board/mchpevb1/gpio.inc b/board/mchpevb1/gpio.inc index 360f09e037..e73d7a28c8 100644 --- a/board/mchpevb1/gpio.inc +++ b/board/mchpevb1/gpio.inc @@ -25,7 +25,7 @@ #define GPIO_BOTH_EDGES_PU (GPIO_INT_BOTH | GPIO_PULL_UP) /* Only needed if CONFIG_HOSTCMD_ESPI is not set, using LPC interface to PCH */ -#ifndef CONFIG_ESPI_PLTRST_IS_VWIRE +#ifndef CONFIG_HOSTCMD_ESPI_PLTRST_IS_VWIRE GPIO_INT(PCH_PLTRST_L, PIN(064), GPIO_BOTH_EDGES_PU, lpcrst_interrupt) #endif |