nocturne: Set up SBU FETs properly.

The SBU FET control should be tied to entering/exiting DP Alt Mode and
not the USB MUX position as the previous commit had.  However, the SBU
lines are also used for CCD and the older boards don't have the
necessary hardware.

BUG=b:114340064
BRANCH=firmware-nocturne-10984.B
TEST=Flash nocturne; verify that external display works after a reboot.
Verify that cr50 is enumerated using SuzyQable.
TEST=Repeat above test on board rev 1.

Change-Id: I5ab9123816fa6ef946dde95b421c5b89bd9719a4
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1250028
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1405611
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>

3 files changed, 37 insertions, 1 deletions

diff --git a/board/nocturne/board.c b/board/nocturne/board.c
index de373e417f..c2a13f7655 100644
--- a/board/nocturne/board.c
+++ b/board/nocturne/board.c
@@ -78,6 +78,21 @@ static void usb_c_interrupt(enum gpio_signal s)
 	sn5s330_interrupt(port);
 }
 
+static void board_connect_c0_sbu_deferred(void)
+{
+	/*
+	 * If CCD_MODE_ODL asserts, it means there's a debug accessory connected
+	 * and we should enable the SBU FETs.
+	 */
+	ppc_set_sbu(0, 1);
+}
+DECLARE_DEFERRED(board_connect_c0_sbu_deferred);
+
+static void board_connect_c0_sbu(enum gpio_signal s)
+{
+	hook_call_deferred(&board_connect_c0_sbu_deferred_data, 0);
+}
+
 #include "gpio_list.h"
 
 const enum gpio_signal hibernate_wake_pins[] = {
@@ -549,6 +564,14 @@ static void board_quirks(void)
 		gpio_set_flags(GPIO_USB_C0_PD_INT_ODL, GPIO_INT_FALLING);
 		gpio_set_flags(GPIO_USB_C1_PD_INT_ODL, GPIO_INT_FALLING);
 	}
+
+	/*
+	 * Older boards don't have the SBU bypass circuitry needed for CCD, so
+	 * enable the CCD_MODE_ODL interrupt such that we can help in making
+	 * sure the SBU FETs are connected.
+	 */
+	if (board_get_version() < 2)
+		gpio_enable_interrupt(GPIO_CCD_MODE_ODL);
 }
 DECLARE_HOOK(HOOK_INIT, board_quirks, HOOK_PRIO_DEFAULT);
 
diff --git a/board/nocturne/gpio.inc b/board/nocturne/gpio.inc
index d9e10de5a6..be53c4e7be 100644
--- a/board/nocturne/gpio.inc
+++ b/board/nocturne/gpio.inc
@@ -34,6 +34,7 @@ GPIO_INT(ACCELGYRO3_INT_L,   PIN(4, 1), GPIO_INT_FALLING, bmi160_interrupt)
 GPIO_INT(BASE_USB_FAULT_ODL, PIN(2, 3), GPIO_INT_FALLING, base_pwr_fault_interrupt)
 GPIO_INT(BASE_PWR_FAULT_ODL, PIN(2, 4), GPIO_INT_FALLING, base_pwr_fault_interrupt)
 GPIO_INT(RCAM_VSYNC,         PIN(E, 4), GPIO_INT_RISING, sync_interrupt)
+GPIO_INT(CCD_MODE_ODL,       PIN(E, 3), GPIO_INT_FALLING, board_connect_c0_sbu)
 
 /* SoC */
 GPIO(RSMRST_L,               PIN(C, 2), GPIO_OUT_LOW)
@@ -67,7 +68,6 @@ GPIO(USB2_VBUSSENSE,         PIN(A, 2), GPIO_OUT_LOW)
 GPIO(USB2_ID,                PIN(A, 0), GPIO_OUT_LOW)
 GPIO(USB_PD_RST_L,           PIN(F, 1), GPIO_OUT_HIGH)
 GPIO(ALS_INT_L,              PIN(5, 0), GPIO_INPUT)
-GPIO(CCD_MODE_ODL,           PIN(E, 3), GPIO_INPUT)
 GPIO(EC_BATT_PRES_L,         PIN(E, 5), GPIO_INPUT)
 GPIO(EC_ENTERING_RW,         PIN(E, 1), GPIO_OUT_LOW)
 GPIO(EC_BL_DISABLE_ODL,      PIN(D, 3), GPIO_ODR_HIGH)
diff --git a/board/nocturne/usb_pd_policy.c b/board/nocturne/usb_pd_policy.c
index 0d264ce896..e4420c2a65 100644
--- a/board/nocturne/usb_pd_policy.c
+++ b/board/nocturne/usb_pd_policy.c
@@ -257,6 +257,17 @@ static void svdm_safe_dp_mode(int port)
 	dp_status[port] = 0;
 	usb_mux_set(port, TYPEC_MUX_NONE,
 		USB_SWITCH_CONNECT, pd_get_polarity(port));
+
+	/*
+	 * Isolate the SBU lines.
+	 *
+	 * Older boards don't have the SBU line bypass needed for CCD, so never
+	 * disable the SBU lines for port 0.
+	 */
+	if ((board_get_version() < 2) && (port == 0))
+		CPRINTS("Skip disable SBU lines for C0.");
+	else
+		ppc_set_sbu(port, 0);
 }
 
 static int svdm_enter_dp_mode(int port, uint32_t mode_caps)
@@ -296,6 +307,8 @@ static int svdm_dp_config(int port, uint32_t *payload)
 	if (!pin_mode)
 		return 0;
 
+	/* Connect the SBU and USB lines to the connector. */
+	ppc_set_sbu(port, 1);
 	usb_mux_set(port, mf_pref ? TYPEC_MUX_DOCK : TYPEC_MUX_DP,
 		    USB_SWITCH_CONNECT, pd_get_polarity(port));