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authorPuthikorn Voravootivat <puthik@chromium.org>2018-08-03 14:44:56 -0700
committerchrome-bot <chrome-bot@chromium.org>2018-08-07 01:51:04 -0700
commitb88052528874d3d627d665ce769ecde7899bdfee (patch)
tree0e43dbb21a19242a8a3e8182c6752478ac7e0fc1 /board/nocturne
parentfe7ef880f84fc9fe204208cb49a566075be5425d (diff)
downloadchrome-ec-b88052528874d3d627d665ce769ecde7899bdfee.tar.gz
nocturne: Dynamically disable effect of SLP_S0# on all VRs
Just setting the global VRMODECTRL register is not enough to disable the effect of SLP_S0# signal. Each VR control register needs to be set correctly to ignore the effect as well. However, disabling VR decay on SLP_S0# assertion by default results in additional power consumption during S0ix. In order to prevent this, VR decay on SLP_S0# assertion needs to be enabled and disabled dynamically as follows: 1. By default on EC boot, PMIC will be initialized to disable VR decay on SLP_S0# assertion. 2. When host indicates intent to enter S0ix, EC will enable decay of VRs on SLP_S0# assertion. 3. When host exits from S0ix and updates the intent to no longer enter S0ix using host command, EC will disable decay of VRs on SLP_S0# assertion. actual SLP_S0# assertion because PMIC seems to honor the setting only at SLP_S0# assertion and not if it is already asserted. BUG=b:112037915 BRANCH=None TEST=pp975_io power near zero in S0ix Change-Id: Iadf12203ac7dbd0adc2d050eab8fbb1839f9902f Signed-off-by: Puthikorn Voravootivat <puthik@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1162776 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Diffstat (limited to 'board/nocturne')
-rw-r--r--board/nocturne/board.c89
1 files changed, 87 insertions, 2 deletions
diff --git a/board/nocturne/board.c b/board/nocturne/board.c
index 7ce129916e..829aa3e997 100644
--- a/board/nocturne/board.c
+++ b/board/nocturne/board.c
@@ -404,6 +404,92 @@ static void board_init(void)
}
DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
+static void board_pmic_disable_slp_s0_vr_decay(void)
+{
+ /*
+ * VCCIOCNT:
+ * Bit 6 (0) - Disable decay of VCCIO on SLP_S0# assertion
+ * Bits 5:4 (11) - Nominal output voltage: 0.850V
+ * Bits 3:2 (10) - VR set to AUTO on SLP_S0# de-assertion
+ * Bits 1:0 (10) - VR set to AUTO operating mode
+ */
+ i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x30, 0x3a);
+
+ /*
+ * V18ACNT:
+ * Bits 7:6 (00) - Disable low power mode on SLP_S0# assertion
+ * Bits 5:4 (10) - Nominal voltage set to 1.8V
+ * Bits 3:2 (10) - VR set to AUTO on SLP_S0# de-assertion
+ * Bits 1:0 (10) - VR set to AUTO operating mode
+ */
+ i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x34, 0x2a);
+
+ /*
+ * V100ACNT:
+ * Bits 7:6 (00) - Disable low power mode on SLP_S0# assertion
+ * Bits 5:4 (01) - Nominal voltage 1.0V
+ * Bits 3:2 (10) - VR set to AUTO on SLP_S0# de-assertion
+ * Bits 1:0 (10) - VR set to AUTO operating mode
+ */
+ i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x37, 0x1a);
+
+ /*
+ * V085ACNT:
+ * Bits 7:6 (00) - Disable low power mode on SLP_S0# assertion
+ * Bits 5:4 (10) - Nominal voltage 0.85V
+ * Bits 3:2 (10) - VR set to AUTO on SLP_S0# de-assertion
+ * Bits 1:0 (10) - VR set to AUTO operating mode
+ */
+ i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x38, 0x2a);
+}
+
+static void board_pmic_enable_slp_s0_vr_decay(void)
+{
+ /*
+ * VCCIOCNT:
+ * Bit 6 (1) - Enable decay of VCCIO on SLP_S0# assertion
+ * Bits 5:4 (11) - Nominal output voltage: 0.850V
+ * Bits 3:2 (10) - VR set to AUTO on SLP_S0# de-assertion
+ * Bits 1:0 (10) - VR set to AUTO operating mode
+ */
+ i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x30, 0x7a);
+
+ /*
+ * V18ACNT:
+ * Bits 7:6 (01) - Enable low power mode on SLP_S0# assertion
+ * Bits 5:4 (10) - Nominal voltage set to 1.8V
+ * Bits 3:2 (10) - VR set to AUTO on SLP_S0# de-assertion
+ * Bits 1:0 (10) - VR set to AUTO operating mode
+ */
+ i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x34, 0x6a);
+
+ /*
+ * V100ACNT:
+ * Bits 7:6 (01) - Enable low power mode on SLP_S0# assertion
+ * Bits 5:4 (01) - Nominal voltage 1.0V
+ * Bits 3:2 (10) - VR set to AUTO on SLP_S0# de-assertion
+ * Bits 1:0 (10) - VR set to AUTO operating mode
+ */
+ i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x37, 0x5a);
+
+ /*
+ * V085ACNT:
+ * Bits 7:6 (01) - Enable low power mode on SLP_S0# assertion
+ * Bits 5:4 (10) - Nominal voltage 0.85V
+ * Bits 3:2 (10) - VR set to AUTO on SLP_S0# de-assertion
+ * Bits 1:0 (10) - VR set to AUTO operating mode
+ */
+ i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x38, 0x6a);
+}
+
+void power_board_handle_host_sleep_event(enum host_sleep_event state)
+{
+ if (state == HOST_SLEEP_EVENT_S0IX_SUSPEND)
+ board_pmic_enable_slp_s0_vr_decay();
+ else if (state == HOST_SLEEP_EVENT_S0IX_RESUME)
+ board_pmic_disable_slp_s0_vr_decay();
+}
+
static void board_pmic_init(void)
{
int pgmask1;
@@ -414,8 +500,7 @@ static void board_pmic_init(void)
pgmask1 |= (1 << 2);
i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x18, pgmask1);
- /* Select 0.85V for the V085A nominal output voltage. */
- i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x38, 0x2a);
+ board_pmic_disable_slp_s0_vr_decay();
/* Enable active discharge (100 ohms) on V33A_PCH and V1.8A. */
i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x3D, 0x5);