npcx7_evb: Add initial board driver of npcx7 ec evb.

Add the evaluation board driver of npcx7 series ec for testing. If you
received the evb which ec is 128-pins package, please notice it has
the following limitations.

a. No GPIOD7/E0 pins.
b. No I2C4_0, I2C4_1, I2C5_1 and I2C6_1 ports.
c. No ADC7, ADC8 and ADC9 channels.
d. No JTAG port 1.
e. Do not enable CONFIG_HIBERNATE_PSL since no PSL circuit on evb.

This CL also includes:
1. Modified reset config from srst to sysresetreq in openocd/npcx.cfg.
   Make sure openocd driver can reset ec by using NVIC_SYSRESETREQ.
2. Add flash utilities for npcx7 ec in openocd/npcx_cmds.tcl.
3. Add npcx7_evb support in flash_ec.

BRANCH=none
BUG=none
TEST=Passed all npcx7 drivers verification on the evb no matter which
     ec's package is 128 or 144 pins package.

Change-Id: I8224d97cd66ce483d70816f47b2e124308f1b69c
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/505832
Reviewed-by: Randall Spangler <rspangler@chromium.org>

1 files changed, 118 insertions, 0 deletions

diff --git a/board/npcx7_evb/board.c b/board/npcx7_evb/board.c
new file mode 100644
index 0000000000..6822a49a43
--- /dev/null
+++ b/board/npcx7_evb/board.c
@@ -0,0 +1,118 @@
+/* Copyright 2017 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Nuvoton M4 EB board-specific configuration */
+
+#include "adc.h"
+#include "adc_chip.h"
+#include "backlight.h"
+#include "chipset.h"
+#include "common.h"
+#include "driver/temp_sensor/tmp006.h"
+#include "extpower.h"
+#include "fan.h"
+#include "fan_chip.h"
+#include "gpio.h"
+#include "i2c.h"
+#include "keyboard_scan.h"
+#include "lid_switch.h"
+#include "peci.h"
+#include "power.h"
+#include "power_button.h"
+#include "pwm.h"
+#include "pwm_chip.h"
+#include "registers.h"
+#include "spi.h"
+#include "switch.h"
+#include "temp_sensor.h"
+#include "temp_sensor_chip.h"
+#include "timer.h"
+#include "thermal.h"
+#include "util.h"
+
+#include "gpio_list.h"
+
+/******************************************************************************/
+/* ADC channels. Must be in the exactly same order as in enum adc_channel. */
+const struct adc_t adc_channels[] = {
+	[ADC_CH_0] = {"ADC0", NPCX_ADC_CH0, ADC_MAX_VOLT, ADC_READ_MAX+1, 0},
+	[ADC_CH_1] = {"ADC1", NPCX_ADC_CH1, ADC_MAX_VOLT, ADC_READ_MAX+1, 0},
+	[ADC_CH_2] = {"ADC2", NPCX_ADC_CH2, ADC_MAX_VOLT, ADC_READ_MAX+1, 0},
+	[ADC_CH_3] = {"ADC3", NPCX_ADC_CH2, ADC_MAX_VOLT, ADC_READ_MAX+1, 0},
+	[ADC_CH_4] = {"ADC4", NPCX_ADC_CH2, ADC_MAX_VOLT, ADC_READ_MAX+1, 0},
+};
+BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
+
+/******************************************************************************/
+/* PWM channels. Must be in the exactly same order as in enum pwm_channel. */
+const struct pwm_t pwm_channels[] = {
+	[PWM_CH_FAN] = { 0, PWM_CONFIG_OPEN_DRAIN, 25000},
+	[PWM_CH_KBLIGHT] = { 2, 0, 10000 },
+};
+BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT);
+
+/******************************************************************************/
+/* Physical fans. These are logically separate from pwm_channels. */
+const struct fan_t fans[] = {
+	[FAN_CH_0] = {
+		.flags = FAN_USE_RPM_MODE,
+		.rpm_min = 1000,
+		.rpm_start = 1000,
+		.rpm_max = 5200,
+		.ch = 0,/* Use MFT id to control fan */
+		.pgood_gpio = GPIO_PGOOD_FAN,
+		.enable_gpio = -1,
+	},
+};
+BUILD_ASSERT(ARRAY_SIZE(fans) == FAN_CH_COUNT);
+
+/******************************************************************************/
+/* MFT channels. These are logically separate from pwm_channels. */
+const struct mft_t mft_channels[] = {
+	[MFT_CH_0] = { NPCX_MFT_MODULE_1, TCKC_LFCLK, PWM_CH_FAN},
+};
+BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT);
+
+/******************************************************************************/
+/* I2C ports */
+const struct i2c_port_t i2c_ports[] = {
+	{"master0-0", NPCX_I2C_PORT0_0, 100, GPIO_I2C0_SCL0, GPIO_I2C0_SDA0},
+	{"master1-0", NPCX_I2C_PORT1_0, 100, GPIO_I2C1_SCL0, GPIO_I2C1_SDA0},
+	{"master2-0", NPCX_I2C_PORT2_0, 100, GPIO_I2C2_SCL0, GPIO_I2C2_SDA0},
+	{"master3-0", NPCX_I2C_PORT3_0, 100, GPIO_I2C3_SCL0, GPIO_I2C3_SDA0},
+	{"master7-0", NPCX_I2C_PORT7_0, 100, GPIO_I2C7_SCL0, GPIO_I2C7_SDA0},
+};
+const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
+
+/******************************************************************************/
+/* SPI devices */
+const struct spi_device_t spi_devices[] = {
+	{ CONFIG_SPI_FLASH_PORT, 0, GPIO_SPI_CS_L},
+};
+const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices);
+
+/******************************************************************************/
+/* Wake-up pins for hibernate */
+const enum gpio_signal hibernate_wake_pins[] = {
+	GPIO_AC_PRESENT,
+	GPIO_LID_OPEN,
+	GPIO_POWER_BUTTON_L,
+};
+const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins);
+
+/******************************************************************************/
+/* Keyboard scan setting */
+struct keyboard_scan_config keyscan_config = {
+	.output_settle_us = 40,
+	.debounce_down_us = 6 * MSEC,
+	.debounce_up_us = 30 * MSEC,
+	.scan_period_us = 1500,
+	.min_post_scan_delay_us = 1000,
+	.poll_timeout_us = SECOND,
+	.actual_key_mask = {
+		0x14, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff,
+		0xa4, 0xff, 0xf6, 0x55, 0xfa, 0xc8  /* full set */
+	},
+};