diff options
| author | Mulin Chao <mlchao@nuvoton.com> | 2016-03-03 10:03:01 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-03-05 04:03:23 -0800 |
| commit | f02a5e90453515e6215e27f565dfd78603a05567 (patch) | |
| tree | 585adae01095c1066888b9bc7c861953bd7b3f35 /board/npcx_evb | |
| parent | dc73b3ed742a25dd11480a7ec6e3ab1393fc7def (diff) | |
| download | chrome-ec-f02a5e90453515e6215e27f565dfd78603a05567.tar.gz | |
npcx: Add 1.8V IO support for some GPIOs and I2C pins.
Add 1.8V IO support for some GPIOs and I2C pins. We use a array
(gpio_lvol_table) to confine which IO pins can switch to 1.8V. Before
setting it to support low voltage level, FW should set IO pin's type to
open-drain and disable internal pulling up or down.
We also add examples in gpio.inc of npcx_evb and npcx_evb_arm to indicate
how to set GPIO & I2C pins to 1.8V if user adds CONFIG_TEST_1P8V definition
in board.h.
In i2c.c driver, this version removes the internal pull-up feature of
i2c ports since the driving force is too weak. (about 30K ohm)
Modified sources:
1. gpio.c: Add 1.8V IO support for some GPIOs and I2C pins.
2. i2c.c: Remove internal pull-ups feature for i2c pins and move 1.8V
support to gpio.c.
3. register.h: Modified NPCX_LV_GPIO_CTL register & bits definitions.
4. npcx_evb\gpio.inc: Add examples of 1.8V IO.
5. npcx_evb_arm\gpio.inc: Add examples of 1.8V IO.
BUG=chrome-os-partner:34346
TEST=make buildall -j; test nuvoton IC specific drivers
BRANCH=none
Change-Id: I73a840ae321820212e50d609dab17576117a7d64
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/330037
Reviewed-by: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'board/npcx_evb')
| -rw-r--r-- | board/npcx_evb/gpio.inc | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/board/npcx_evb/gpio.inc b/board/npcx_evb/gpio.inc index 03e3fcc071..b8d08ec9a4 100644 --- a/board/npcx_evb/gpio.inc +++ b/board/npcx_evb/gpio.inc @@ -19,7 +19,11 @@ GPIO_INT(POWER_BUTTON_L, PIN(0, 2), GPIO_PULL_UP | GPIO_INT_BOTH, power_butt GPIO_INT(LID_OPEN, PIN(3, 3), GPIO_PULL_DOWN | GPIO_INT_BOTH, lid_interrupt) /* Lid switch */ /**************************** Need a empty line between GPIO_INT and GPIO ****************************/ -GPIO(ENTERING_RW, PIN(3, 6), GPIO_OUT_LOW) /* Indicate when EC is entering RW code */ +#ifdef CONFIG_TEST_1P8V +GPIO(ENTERING_RW, PIN(3, 6), GPIO_ODR_LOW | GPIO_SEL_1P8V) /* Indicate when EC is entering RW code */ +#else +GPIO(ENTERING_RW, PIN(3, 6), GPIO_OUT_LOW ) /* Indicate when EC is entering RW code */ +#endif GPIO(PCH_WAKE_L, PIN(5, 0), GPIO_OUT_HIGH) /* Wake signal output to PCH */ /* Used for module testing */ @@ -30,8 +34,13 @@ GPIO(SPI_CS_L, PIN(A, 5), GPIO_OUT_HIGH) * I2C pins should be configured as inputs until I2C module is * initialized. This will avoid driving the lines unintentionally. */ +#ifdef CONFIG_TEST_1P8V +GPIO(I2C0_SCL0, PIN(B, 5), GPIO_ODR_HIGH | GPIO_SEL_1P8V) +GPIO(I2C0_SDA0, PIN(B, 4), GPIO_ODR_HIGH | GPIO_SEL_1P8V) +#else GPIO(I2C0_SCL0, PIN(B, 5), GPIO_ODR_HIGH) GPIO(I2C0_SDA0, PIN(B, 4), GPIO_ODR_HIGH) +#endif GPIO(I2C0_SCL1, PIN(B, 3), GPIO_ODR_HIGH) GPIO(I2C0_SDA1, PIN(B, 2), GPIO_ODR_HIGH) GPIO(I2C1_SCL, PIN(9, 0), GPIO_ODR_HIGH) |