diff options
author | Shawn Nematbakhsh <shawnn@chromium.org> | 2015-11-30 16:30:59 -0800 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2015-12-04 01:20:33 -0800 |
commit | 743a9ea7cd39dffc4f1dc104803f767ba774372b (patch) | |
tree | a31b89a803f213a2421cbef449fff19cae5c5f5e /board/npcx_evb | |
parent | 6b75bfee7e66ff2061b3ca114ec52fada16af731 (diff) | |
download | chrome-ec-743a9ea7cd39dffc4f1dc104803f767ba774372b.tar.gz |
pwm: Add common initialization for PWM pins
Rather than having various PWM module groups initialized from various
HOOK_INIT functions, group them all into a single module and initialize
them all from a common function in pwm.c.
BUG=chromium:563708
TEST=Manual on samus / samus_pd (with CONFIG_ADC enabled). Verify that
samus fan + KB backlight control is functional and samus_pd correctly
sets PWM output.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I9f9b09bfa544cd9bc6b7a867e77757dff0505941
Reviewed-on: https://chromium-review.googlesource.com/314882
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Diffstat (limited to 'board/npcx_evb')
-rw-r--r-- | board/npcx_evb/gpio.inc | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/board/npcx_evb/gpio.inc b/board/npcx_evb/gpio.inc index 027855620b..526960ca1b 100644 --- a/board/npcx_evb/gpio.inc +++ b/board/npcx_evb/gpio.inc @@ -61,13 +61,13 @@ ALTERNATE(PIN_MASK(D, 0x03), 1, MODULE_I2C, 0) /* I2C3SDA/I2C3SCL ALTERNATE(PIN_MASK(4, 0x38), 1, MODULE_ADC, 0) /* ADC GPIO45/44/43 */ ALTERNATE(PIN_MASK(A, 0x0A), 1, MODULE_SPI, 0) /* SPIP_MOSI/SPIP_SCLK GPIOA3/A1 */ ALTERNATE(PIN_MASK(9, 0x20), 1, MODULE_SPI, 0) /* SPIP_MISO GPIO95 */ -ALTERNATE(PIN_MASK(C, 0x04), 3, MODULE_PWM_KBLIGHT, 0) /* PWM1 for PWM/KBLIGHT Test GPIOC2 */ +ALTERNATE(PIN_MASK(C, 0x04), 3, MODULE_PWM, 0) /* PWM1 for PWM/KBLIGHT Test GPIOC2 */ /* Alternative functionality for FANS */ #ifdef CONFIG_FANS -ALTERNATE(PIN_MASK(C, 0x08), 7, MODULE_PWM_FAN, 0) /* PWM0 for PWM/FAN Test GPIOC3 */ +ALTERNATE(PIN_MASK(C, 0x08), 7, MODULE_PWM, 0) /* PWM0 for PWM/FAN Test GPIOC3 */ #if NPCX_TACH_SEL2 -ALTERNATE(PIN_MASK(9, 0x08), 3, MODULE_PWM_FAN, 0) /* MFT-1/TA1_TACH1 for FAN GPIO93 */ +ALTERNATE(PIN_MASK(9, 0x08), 3, MODULE_PWM, 0) /* MFT-1/TA1_TACH1 for FAN GPIO93 */ #else -ALTERNATE(PIN_MASK(4, 0x01), 3, MODULE_PWM_FAN, 0) /* MFT-1/TA1_TACH1 for FAN Test GPIO40 */ +ALTERNATE(PIN_MASK(4, 0x01), 3, MODULE_PWM, 0) /* MFT-1/TA1_TACH1 for FAN Test GPIO40 */ #endif #endif |