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| author | Mulin Chao <mlchao@nuvoton.com> | 2016-01-05 18:13:40 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-01-06 20:43:32 -0800 |
| commit | a4175c650eaeb66a7537d25358744b5a36292416 (patch) | |
| tree | 5910ed211fc14e002fa18d531ef02f1bfd21edb1 /board/npcx_evb | |
| parent | 0af6e77a3a90299418628a997c81436acbec242c (diff) | |
| download | chrome-ec-a4175c650eaeb66a7537d25358744b5a36292416.tar.gz | |
nuc: Support rpm mode for fan control.
In order to support rpm mode, we use a TICK function (fan_tick_func) to
monitor tacho value and adjust PWM duty. In this version, fan driver always
enables clock source of MFT to make sure it can present real-time tacho value.
For better performance, the feedback value to adjust PWM duty is various.
We also change fan & pwm settings for SUNUN 4-pins pwm-type fan.
Modified drivers:
1. npcx_evb/board.h: Modified fan_t & pwm_t structures for SUNON fan spec.
2. npcx_evb_arm/board.h: Modified fan_t & pwm_t structures for SUNON fan spec.
3. fan_chip.h: Remove unnecessary default_count field of mft_t structure
4. fan.c: Add support for rpm mode
BUG=chrome-os-partner:34346
TEST=make buildall -j; test nuvoton IC specific drivers
BRANCH=none
Change-Id: I25e7bd2f3f726b40fd4e0d9a1049a4d82bbd830d
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/320510
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'board/npcx_evb')
| -rw-r--r-- | board/npcx_evb/board.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/board/npcx_evb/board.c b/board/npcx_evb/board.c index e5b70d7f7d..aebd379e63 100644 --- a/board/npcx_evb/board.c +++ b/board/npcx_evb/board.c @@ -45,7 +45,7 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); /******************************************************************************/ /* PWM channels. Must be in the exactly same order as in enum pwm_channel. */ const struct pwm_t pwm_channels[] = { - [PWM_CH_FAN] = { 0, PWM_CONFIG_ACTIVE_LOW | PWM_CONFIG_DSLEEP_CLK, 100}, + [PWM_CH_FAN] = { 0, PWM_CONFIG_DSLEEP_CLK, 100}, [PWM_CH_KBLIGHT] = { 1, 0, 10000 }, }; BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); @@ -55,9 +55,9 @@ BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); const struct fan_t fans[] = { [FAN_CH_0] = { .flags = FAN_USE_RPM_MODE, - .rpm_min = 1020, - .rpm_start = 1020, - .rpm_max = 8190, + .rpm_min = 1000, + .rpm_start = 1000, + .rpm_max = 5200, .ch = 0,/* Use MFT id to control fan */ .pgood_gpio = GPIO_PGOOD_FAN, .enable_gpio = -1, @@ -68,7 +68,7 @@ BUILD_ASSERT(ARRAY_SIZE(fans) == FAN_CH_COUNT); /******************************************************************************/ /* MFT channels. These are logically separate from mft_channels. */ const struct mft_t mft_channels[] = { - [MFT_CH_0] = { NPCX_MFT_MODULE_1, 0xFFFF, TCKC_LFCLK, PWM_CH_FAN}, + [MFT_CH_0] = { NPCX_MFT_MODULE_1, TCKC_LFCLK, PWM_CH_FAN}, }; BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); |