diff options
| author | Steven Jian <steven.jian@intel.com> | 2015-04-01 01:25:42 +0800 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-05-27 03:58:16 +0000 |
| commit | 937cc8a64e5971def21303e7a19a4ad9553e0ace (patch) | |
| tree | 321543152e0c4d61e686ca7b92edd0d027bb168b /board/npcx_evb | |
| parent | e216906c9327655d71b8758b7f11c2f744e55018 (diff) | |
| download | chrome-ec-937cc8a64e5971def21303e7a19a4ad9553e0ace.tar.gz | |
mec1322: Simplify GPIO lists
Our existing GPIO macros use port# / gpio#, but the concept of different
GPIO ports does not exist on the mec1322. Therefore, add new GPIO macros
for chips which do not have distinct GPIO ports.
BUG=None
BRANCH=None
TEST=make buildall -j
Change-Id: Ibda97c6563ad447d16dab39ecadab43ccb25174b
Signed-off-by: Steven Jian <steven.jian@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/262841
Reviewed-by: Anton Staaf <robotboy@chromium.org>
Diffstat (limited to 'board/npcx_evb')
| -rw-r--r-- | board/npcx_evb/gpio.inc | 48 |
1 files changed, 24 insertions, 24 deletions
diff --git a/board/npcx_evb/gpio.inc b/board/npcx_evb/gpio.inc index 77dbd801c5..4c6114c784 100644 --- a/board/npcx_evb/gpio.inc +++ b/board/npcx_evb/gpio.inc @@ -6,43 +6,43 @@ */ /* TODO: Redefine debug 2 inputs */ -GPIO_INT(RECOVERY_L, 0, 0, GPIO_PULL_UP | GPIO_INT_BOTH, switch_interrupt) /* Recovery signal from servo */ -GPIO_INT(WP_L, 9, 3, GPIO_PULL_DOWN | GPIO_INT_BOTH, switch_interrupt) /* Write protect input */ +GPIO_INT(RECOVERY_L, PIN(0, 0), GPIO_PULL_UP | GPIO_INT_BOTH, switch_interrupt) /* Recovery signal from servo */ +GPIO_INT(WP_L, PIN(9, 3), GPIO_PULL_DOWN | GPIO_INT_BOTH, switch_interrupt) /* Write protect input */ /* For testing 8042 commands, we need the following GPIOs */ /* TODO: Redefine 4 inputs */ -GPIO_INT(POWER_BUTTON_L, 0, 2, GPIO_PULL_UP | GPIO_INT_BOTH, power_button_interrupt) /* Power button */ -GPIO_INT(LID_OPEN, 3, 3, GPIO_PULL_DOWN | GPIO_INT_BOTH, lid_interrupt) /* Lid switch */ +GPIO_INT(POWER_BUTTON_L, PIN(0, 2), GPIO_PULL_UP | GPIO_INT_BOTH, power_button_interrupt) /* Power button */ +GPIO_INT(LID_OPEN, PIN(3, 3), GPIO_PULL_DOWN | GPIO_INT_BOTH, lid_interrupt) /* Lid switch */ -GPIO(ENTERING_RW, 3, 6, GPIO_OUT_LOW) /* Indicate when EC is entering RW code */ -GPIO(PCH_WAKE_L, 5, 0, GPIO_OUT_HIGH) /* Wake signal output to PCH */ +GPIO(ENTERING_RW, PIN(3, 6), GPIO_OUT_LOW) /* Indicate when EC is entering RW code */ +GPIO(PCH_WAKE_L, PIN(5, 0), GPIO_OUT_HIGH) /* Wake signal output to PCH */ /* Used for module testing */ -GPIO(PGOOD_FAN, C, 7, GPIO_PULL_UP | GPIO_INPUT) /* Power Good for FAN test */ -GPIO(SPI_CS_L, A, 5, GPIO_OUT_HIGH) /* SPI_CS Ready, Low Active. */ +GPIO(PGOOD_FAN, PIN(C, 7), GPIO_PULL_UP | GPIO_INPUT) /* Power Good for FAN test */ +GPIO(SPI_CS_L, PIN(A, 5), GPIO_OUT_HIGH) /* SPI_CS Ready, Low Active. */ /* * I2C pins should be configured as inputs until I2C module is * initialized. This will avoid driving the lines unintentionally. */ -GPIO(MASTER_I2C_SCL, B, 5, GPIO_INPUT) -GPIO(MASTER_I2C_SDA, B, 4, GPIO_INPUT) +GPIO(MASTER_I2C_SCL, PIN(B, 5), GPIO_INPUT) +GPIO(MASTER_I2C_SDA, PIN(B, 4), GPIO_INPUT) /* Used for board version command */ -GPIO(BOARD_VERSION1, 6, 4, GPIO_INPUT) /* Board version stuffing resistor 1 */ -GPIO(BOARD_VERSION2, 6, 5, GPIO_INPUT) /* Board version stuffing resistor 2 */ -GPIO(BOARD_VERSION3, 6, 6, GPIO_INPUT) /* Board version stuffing resistor 3 */ +GPIO(BOARD_VERSION1, PIN(6, 4), GPIO_INPUT) /* Board version stuffing resistor 1 */ +GPIO(BOARD_VERSION2, PIN(6, 5), GPIO_INPUT) /* Board version stuffing resistor 2 */ +GPIO(BOARD_VERSION3, PIN(6, 6), GPIO_INPUT) /* Board version stuffing resistor 3 */ #ifdef CONFIG_KEYBOARD_COL2_INVERTED -GPIO(KBD_KSO2, 1, 7, GPIO_OUT_LOW) /* Negative edge triggered keyboard irq. */ +GPIO(KBD_KSO2, PIN(1, 7), GPIO_OUT_LOW) /* Negative edge triggered keyboard irq. */ #endif /* Alternate pins for UART/I2C/ADC/SPI/PWM/MFT */ -ALTERNATE(1, 0x03, 1, MODULE_UART, 0) /* CR_SIN/SOUT GPIO10/11 */ -ALTERNATE(B, 0x30, 1, MODULE_I2C, 0) /* I2C0SDA/I2C0SCL GPIOB4/B5 */ -ALTERNATE(8, 0x80, 1, MODULE_I2C, 0) /* I2C1SDA GPIO87 */ -ALTERNATE(9, 0x07, 1, MODULE_I2C, 0) /* I2C1SCL/I2C2SDA/I2C2SCL GPIO90/91/92 */ -ALTERNATE(4, 0x38, 1, MODULE_ADC, 0) /* ADC GPIO45/44/43 */ -ALTERNATE(A, 0x0A, 1, MODULE_SPI, 0) /* SPIP_MOSI/SPIP_SCLK GPIOA3/A1 */ -ALTERNATE(9, 0x20, 1, MODULE_SPI, 0) /* SPIP_MISO GPIO95 */ -ALTERNATE(C, 0x04, 3, MODULE_PWM_KBLIGHT, 0) /* PWM1 for PWM/KBLIGHT Test GPIOC2 */ -ALTERNATE(C, 0x08, 7, MODULE_PWM_FAN, 0) /* PWM0 for PWM/FAN Test GPIOC3 */ -ALTERNATE(4, 0x01, 3, MODULE_PWM_FAN, 0) /* MFT-1/TA1_TACH1 for FAN Test GPIO40 */ +ALTERNATE(PIN_MASK(1, 0x03), 1, MODULE_UART, 0) /* CR_SIN/SOUT GPIO10/11 */ +ALTERNATE(PIN_MASK(B, 0x30), 1, MODULE_I2C, 0) /* I2C0SDA/I2C0SCL GPIOB4/B5 */ +ALTERNATE(PIN_MASK(8, 0x80), 1, MODULE_I2C, 0) /* I2C1SDA GPIO87 */ +ALTERNATE(PIN_MASK(9, 0x07), 1, MODULE_I2C, 0) /* I2C1SCL/I2C2SDA/I2C2SCL GPIO90/91/92 */ +ALTERNATE(PIN_MASK(4, 0x38), 1, MODULE_ADC, 0) /* ADC GPIO45/44/43 */ +ALTERNATE(PIN_MASK(A, 0x0A), 1, MODULE_SPI, 0) /* SPIP_MOSI/SPIP_SCLK GPIOA3/A1 */ +ALTERNATE(PIN_MASK(9, 0x20), 1, MODULE_SPI, 0) /* SPIP_MISO GPIO95 */ +ALTERNATE(PIN_MASK(C, 0x04), 3, MODULE_PWM_KBLIGHT, 0) /* PWM1 for PWM/KBLIGHT Test GPIOC2 */ +ALTERNATE(PIN_MASK(C, 0x08), 7, MODULE_PWM_FAN, 0) /* PWM0 for PWM/FAN Test GPIOC3 */ +ALTERNATE(PIN_MASK(4, 0x01), 3, MODULE_PWM_FAN, 0) /* MFT-1/TA1_TACH1 for FAN Test GPIO40 */ |