diff options
| author | Ian Chao <mlchao@nuvoton.com> | 2015-07-09 14:53:00 +0800 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-07-25 01:22:32 +0000 |
| commit | 14bd917343489c09033f0f9c97e7951d5cb2aeec (patch) | |
| tree | 1722f9d92f5ffb2525eebec68f86b1aab06b3e71 /board/npcx_evb_arm/gpio.inc | |
| parent | 7de0037538bd0016c9202ad289655cbf4f4d90aa (diff) | |
| download | chrome-ec-14bd917343489c09033f0f9c97e7951d5cb2aeec.tar.gz | |
nuc:
Add ECST tool to modify the header used by npcx booter.
Modified drivers:
1. i2c.c: Modify for i2c_port design.
2. i2c.c: Fixed bugs when mutil-tasks use the same i2c port and pull-up issue.
3. hwtimer.c: Fixed bug whcih event expired time is behide current timer.
4. lpc.c: Add intializing host settings after pltrst is deasserted.
5. uart.c/clock.c/register.h: Fixed bug which cannot enter deep-idle
when gpio is any-edge trigger mode.
6. task.c: Add workaround method for hard fault issue.
7. keyboard_raw.c: Modified for support CONFIG_KEYBOARD_KSO_BASE
8. lpc.c: Modified for support CONFIG_KEYBOARD_IRQ_GPIO
9. lpc.c: fixed obe interrupt bug during 8042 initialization
10.Adjust path of flat files for new Makefile rules
11.Fixed build error on lpc.c without CONFIG_KEYBOARD_IRQ_GPIO
BUG=chrome-os-partner:34346
TEST=make buildall -j; test nuvoton IC specific drivers
BRANCH=none
Change-Id: Icf9494174b245b4026e396be877d578f36b6f6a5
Signed-off-by: Ian Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/284036
Reviewed-by: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Shawn N <shawnn@chromium.org>
Diffstat (limited to 'board/npcx_evb_arm/gpio.inc')
| -rw-r--r-- | board/npcx_evb_arm/gpio.inc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/board/npcx_evb_arm/gpio.inc b/board/npcx_evb_arm/gpio.inc index 410ac90894..30e19ef1a9 100644 --- a/board/npcx_evb_arm/gpio.inc +++ b/board/npcx_evb_arm/gpio.inc @@ -8,7 +8,7 @@ /********************** Inputs with interrupt handlers are first for efficiency **********************/ /* TODO: Redefine debug 2 inputs */ GPIO_INT(RECOVERY_L, PIN(0, 0), GPIO_PULL_UP | GPIO_INT_BOTH, switch_interrupt) /* Recovery signal from servo */ -GPIO_INT(WP_L, PIN(9, 3), GPIO_PULL_DOWN | GPIO_INT_BOTH, switch_interrupt) /* Write protect input */ +GPIO_INT(WP_L, PIN(9, 3), GPIO_PULL_UP | GPIO_INT_BOTH, switch_interrupt) /* Write protect input */ /* Used for ARM based platform */ GPIO_INT(SHI_CS_L, PIN(5, 3), GPIO_INT_FALLING,shi_cs_event) /* SHI CS Ready, Low Active. */ /* For testing keyboard commands, we need the following 4 GPIOs */ @@ -52,6 +52,7 @@ ALTERNATE(PIN_MASK(B, 0x30), 1, MODULE_I2C, 0) /* I2C0SDA/I2C0SCL #endif ALTERNATE(PIN_MASK(8, 0x80), 1, MODULE_I2C, 0) /* I2C1SDA GPIO87 */ ALTERNATE(PIN_MASK(9, 0x07), 1, MODULE_I2C, 0) /* I2C1SCL/I2C2SDA/I2C2SCL GPIO90/91/92 */ +ALTERNATE(PIN_MASK(D, 0x03), 1, MODULE_I2C, 0) /* I2C3SDA/I2C3SCL GPIOD0/D1 */ ALTERNATE(PIN_MASK(4, 0x38), 1, MODULE_ADC, 0) /* ADC GPIO45/44/43 */ ALTERNATE(PIN_MASK(A, 0x0A), 1, MODULE_SPI, 0) /* SPIP_MOSI/SPIP_SCLK GPIOA3/A1 */ ALTERNATE(PIN_MASK(9, 0x20), 1, MODULE_SPI, 0) /* SPIP_MISO GPIO95 */ |