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| author | Rong Chang <rongchang@chromium.org> | 2015-06-11 20:38:21 +0800 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-06-17 20:24:18 +0000 |
| commit | dd1987051b473e74dab3490921d0cc77c76fcac3 (patch) | |
| tree | 0e4f28d2302d3dfc33b67082139ef814068a43c3 /board/oak/usb_pd_policy.c | |
| parent | 4982391dc27960c5af4e1814d627154a8aac3e29 (diff) | |
| download | chrome-ec-dd1987051b473e74dab3490921d0cc77c76fcac3.tar.gz | |
oak: enable USBC superspeed mux
This change enables USB3/DP superspeed mux. Oak's two type-C ports share
one DP hardware. When both ports connect to DP output device, only the
first DP signal will be routed to SoC. On exit dp mode, oak sends HPD
again if the other port's DP flag is on.
BRANCH=none
BUG=chrome-os-partner:41404
TEST=none
Change-Id: I7eebc0b2354f93d7421bf83796294a6b2acf4c3b
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/277000
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Diffstat (limited to 'board/oak/usb_pd_policy.c')
| -rw-r--r-- | board/oak/usb_pd_policy.c | 30 |
1 files changed, 27 insertions, 3 deletions
diff --git a/board/oak/usb_pd_policy.c b/board/oak/usb_pd_policy.c index cc7abc60d6..10665c08e9 100644 --- a/board/oak/usb_pd_policy.c +++ b/board/oak/usb_pd_policy.c @@ -234,7 +234,8 @@ static void svdm_safe_dp_mode(int port) { /* make DP interface safe until configure */ dp_flags[port] = 0; - /* board_set_usb_mux(port, TYPEC_MUX_NONE, pd_get_polarity(port)); */ + board_set_usb_mux(port, TYPEC_MUX_NONE, + USB_SWITCH_CONNECT, pd_get_polarity(port)); } static int svdm_enter_dp_mode(int port, uint32_t mode_caps) @@ -267,7 +268,8 @@ static int svdm_dp_status(int port, uint32_t *payload) static int svdm_dp_config(int port, uint32_t *payload) { int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT); - /* board_set_usb_mux(port, TYPEC_MUX_DP, pd_get_polarity(port)); */ + board_set_usb_mux(port, TYPEC_MUX_DP, + USB_SWITCH_CONNECT, pd_get_polarity(port)); payload[0] = VDO(USB_SID_DISPLAYPORT, 1, CMD_DP_CONFIG | VDO_OPOS(opos)); payload[1] = VDO_DP_CFG(MODE_DP_PIN_E, /* pin mode */ @@ -281,10 +283,32 @@ static void svdm_dp_post_config(int port) dp_flags[port] |= DP_FLAGS_DP_ON; if (!(dp_flags[port] & DP_FLAGS_HPD_HI_PENDING)) return; + board_typec_dp_set(port, 1); } static int svdm_dp_attention(int port, uint32_t *payload) { + int cur_lvl; + int lvl = PD_VDO_DPSTS_HPD_LVL(payload[1]); + int irq = PD_VDO_DPSTS_HPD_IRQ(payload[1]); + + cur_lvl = gpio_get_level(GPIO_USB_DP_HPD); + + /* Its initial DP status message prior to config */ + if (!(dp_flags[port] & DP_FLAGS_DP_ON)) { + if (lvl) + dp_flags[port] |= DP_FLAGS_HPD_HI_PENDING; + return 1; + } + + if (irq & cur_lvl) { + board_typec_dp_on(port); + } else if (irq & !cur_lvl) { + CPRINTF("ERR:HPD:IRQ&LOW\n"); + return 0; /* nak */ + } else { + board_typec_dp_set(port, lvl); + } /* ack */ return 1; } @@ -292,7 +316,7 @@ static int svdm_dp_attention(int port, uint32_t *payload) static void svdm_exit_dp_mode(int port) { svdm_safe_dp_mode(port); - /* gpio_set_level(PORT_TO_HPD(port), 0); */ + board_typec_dp_off(port, dp_flags); } static int svdm_enter_gfu_mode(int port, uint32_t mode_caps) |