diff options
| author | YH Huang <yh.huang@mediatek.com> | 2015-10-23 17:43:57 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2015-10-23 08:47:25 -0700 |
| commit | accc98d7c3fdcad6e35ac2ebeb63fbda3abf8d2e (patch) | |
| tree | 47a032ca0238e750e9ff83155a9bfaa68f630d59 /board/oak | |
| parent | c5f9f00dfbd00642e5bb948bee977ca1be58c13b (diff) | |
| download | chrome-ec-accc98d7c3fdcad6e35ac2ebeb63fbda3abf8d2e.tar.gz | |
oak: revise suspend gpio setting for rev4
Revise gpio setting of suspend signal for rev4 hardware.
BUG=chrome-os-partner:46579
TEST=run "make BOARD=oak -j" and enable SW sync in bootloader
EC SW sync works fine.
Change-Id: I8864dfaa8ae7ef9a47d0a08499d88eb8999160c5
Signed-off-by: YH Huang <yh.huang@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/308351
Reviewed-by: Rong Chang <rongchang@chromium.org>
Diffstat (limited to 'board/oak')
| -rw-r--r-- | board/oak/gpio.inc | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/board/oak/gpio.inc b/board/oak/gpio.inc index d93f0bb43c..bb6b68fd56 100644 --- a/board/oak/gpio.inc +++ b/board/oak/gpio.inc @@ -9,7 +9,11 @@ GPIO_INT(AC_PRESENT, PIN(C, 6), GPIO_INT_BOTH, extpower_interrupt) GPIO_INT(POWER_BUTTON_L, PIN(B, 5), GPIO_INT_BOTH | GPIO_PULL_UP, power_button_interrupt) GPIO_INT(LID_OPEN, PIN(C, 13), GPIO_INT_BOTH, lid_interrupt) /* LID switch detection */ +#if BOARD_REV <= OAK_REV3 GPIO_INT(SUSPEND_L, PIN(C, 7), GPIO_INT_BOTH | GPIO_PULL_DOWN, power_signal_interrupt) /* AP suspend/resume state */ +#else +GPIO_INT(SUSPEND_L, PIN(C, 7), GPIO_INT_BOTH, power_signal_interrupt) /* AP suspend/resume state */ +#endif GPIO_INT(PD_MCU_INT, PIN(E, 0), GPIO_INT_FALLING, pd_mcu_interrupt) /* Signal from PD MCU, external pull-up */ GPIO_INT(SPI1_NSS, PIN(A, 4), GPIO_INT_BOTH | GPIO_PULL_UP, spi_event) /* SPI Chip Select */ |