oak: Modify GPIO list for rev 1.5 boards

Rev 1.5 hardware redefined EC and PD phy IO controls. This change adds macro
to map configurations at compile time.

BRANCH=none
BUG=none
TEST=manual
  build and flash ec.bin
  plug type-c charger on port 0

Change-Id: I60c2f1448fbdea9bb72d1f3b19de366cad150087
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/274771
Reviewed-by: Alec Berg <alecaberg@chromium.org>

3 files changed, 43 insertions, 27 deletions

diff --git a/board/oak_pd/board.h b/board/oak_pd/board.h
index ac3d6eae64..07e763057a 100644
--- a/board/oak_pd/board.h
+++ b/board/oak_pd/board.h
@@ -8,6 +8,10 @@
 #ifndef __BOARD_H
 #define __BOARD_H
 
+#undef CONFIG_BOARD_OAK_REV_1
+#define CONFIG_BOARD_OAK_REV_1_5
+#undef CONFIG_BOARD_OAK_REV_2
+
 /*
  * The flash size is only 32kB.
  * No space for 2 partitions,
diff --git a/board/oak_pd/gpio.inc b/board/oak_pd/gpio.inc
index 542f887f35..9547f57bba 100644
--- a/board/oak_pd/gpio.inc
+++ b/board/oak_pd/gpio.inc
@@ -42,9 +42,12 @@ GPIO(USB_C1_CC2_ODL,         PIN(A, 8),  GPIO_ODR_LOW)
 GPIO(SLAVE_I2C_SCL,          PIN(B, 6),  GPIO_INPUT)
 GPIO(SLAVE_I2C_SDA,          PIN(B, 7),  GPIO_INPUT)
 
-/* Case closed debugging. */
+#ifdef CONFIG_OAK_BOARD_REV_1
 GPIO(EC_INT,                 PIN(A, 14), GPIO_OUT_HIGH)
-GPIO(TP_194,                 PIN(B, 5),  GPIO_OUT_LOW)
+#else
+GPIO(EC_INT,                 PIN(B, 5),  GPIO_OUT_HIGH)
+#endif
+
 UNIMPLEMENTED(WP_L)
 UNIMPLEMENTED(ENTERING_RW)
 
diff --git a/board/oak_pd/usb_pd_config.h b/board/oak_pd/usb_pd_config.h
index 2f91727cb8..d704e2a8ae 100644
--- a/board/oak_pd/usb_pd_config.h
+++ b/board/oak_pd/usb_pd_config.h
@@ -95,7 +95,7 @@ static inline void pd_set_pins_speed(int port)
 		STM32_GPIO_OSPEEDR(GPIO_B) |= 0x00030000;
 	} else {
 		/* 40 MHz pin speed on SPI PB13/14,
-		 * (USB_C1_TX_CLKIN & USB_C1_CC1_TX_DATA)
+		 * (USB_C1_TX_CLKIN & USB_C1_CCX_TX_DATA)
 		 */
 		STM32_GPIO_OSPEEDR(GPIO_B) |= 0x3C000000;
 		/* 40 MHz pin speed on TIM15_CH2 (PB15) */
@@ -143,7 +143,19 @@ static inline void pd_tx_enable(int port, int polarity)
 		/* put SPI function on TX pin */
 		/* USB_C1_CCX_TX_DATA: PB14 is SPI1 MISO */
 		gpio_set_alternate_function(GPIO_B, 0x4000, 0);
-		/* TODO: MCU ADC pin output low */
+		/* MCU ADC pin output low */
+		if (polarity) {
+			STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A)
+					& ~(3 << (2*5))) /* PA5 disable ADC */
+					|  (1 << (2*5)); /* Set as GPO */
+			gpio_set_level(GPIO_USB_C1_CC2_PD, 0);
+		} else {
+			STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A)
+					& ~(3 << (2*0))) /* PA0 disable ADC */
+					|  (1 << (2*0)); /* Set as GPO */
+			gpio_set_level(GPIO_USB_C1_CC1_PD, 0);
+		}
+
 		/*
 		 * There is a pin muxer to select CC1 or CC2 TX_DATA,
 		 * Pin mux is controlled by USB_C1_CC2_TX_SEL pin,
@@ -158,37 +170,32 @@ static inline void pd_tx_enable(int port, int polarity)
 static inline void pd_tx_disable(int port, int polarity)
 {
 	if (port == 0) {
-		/* output low on SPI TX to disable the FET */
 		if (polarity) {/* PA6 is SPI1 MISO */
-			gpio_set_alternate_function(GPIO_A, 0x0040, -1);
-			/* TODO: Set MCU ADC PA4 pin to ADC function (Hi-Z) */
+			/* set ADC PA4 pin to ADC function (Hi-Z) */
 			STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A)
 					|  (3 << (2*4))) /* PA4 as ADC */
 					& ~(1 << (2*4)); /* disable GPO */
+			gpio_set_alternate_function(GPIO_A, 0x0040, -1);
 		} else {/* PB4 is SPI1 MISO */
-			gpio_set_alternate_function(GPIO_B, 0x0010, -1);
-			/* put the low level reference in Hi-Z */
-			/* TODO: Set MCU ADC PA2 pin to ADC function (Hi-Z) */
+			/* set ADC PA4 pin to ADC function (Hi-Z) */
 			STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A)
-					|  (3 << (2*2))) /* PA2 disable ADC */
-					& ~(1 << (2*2)); /* Set as GPO */
+					|  (3 << (2*2))) /* PA2 as ADC */
+					& ~(1 << (2*2)); /* disable GPO */
+			gpio_set_alternate_function(GPIO_B, 0x0010, -1);
 		}
 	} else {
-		/* Select the pin according to the polarity */
-		gpio_set_level(GPIO_USB_C1_CC2_TX_SEL, polarity);
-		/* output low on SPI TX to disable the FET */
-		/* PB14 is SPI2 MISO */
-		STM32_GPIO_MODER(GPIO_B) = (STM32_GPIO_MODER(GPIO_B)
-				& ~(3 << (2*14))) /* Pin14 disable ADC */
-				|  (1 << (2*14)); /* Set as GPO */
-		/* 00: Input mode (reset state)
-		 * 01: General purpose output mode
-		 * 10: Alternate function mode
-		 * 11: Analog mode
-		 */
-
-		/* put the low level reference in Hi-Z */
-		/* TODO: Set MCU ADC pin to ADC function (Hi-Z) */
+		if (polarity) {
+			/* set ADC PA4 pin to ADC function (Hi-Z) */
+			STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A)
+					|  (3 << (2*5))) /* PA5 as ADC */
+					& ~(1 << (2*5)); /* disable GPO */
+		} else {
+			/* set ADC PA4 pin to ADC function (Hi-Z) */
+			STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A)
+					|  (3 << (2*0))) /* PA0 as ADC */
+					& ~(1 << (2*0)); /* disable GPO */
+		}
+		gpio_set_alternate_function(GPIO_B, 0x4000, -1);
 	}
 }
 
@@ -246,6 +253,7 @@ static inline void pd_set_host_mode(int port, int enable)
 			/* High-Z is used for host mode. */
 			gpio_set_level(GPIO_USB_C1_CC1_ODL, 1);
 			gpio_set_level(GPIO_USB_C1_CC2_ODL, 1);
+			/* Set TX Hi-Z */
 			gpio_set_flags(GPIO_USB_C1_CCX_TX_DATA, GPIO_INPUT);
 		} else {
 			/* Set HOST_HIGH to High-Z for device mode. */
@@ -314,3 +322,4 @@ static inline void pd_set_vconn(int port, int polarity, int enable)
 }
 
 #endif /* __USB_PD_CONFIG_H */
+