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authorAlec Berg <alecaberg@chromium.org>2015-06-23 17:52:04 -0700
committerChromeOS Commit Bot <chromeos-commit-bot@chromium.org>2015-06-30 17:18:25 +0000
commit82ec2510a3acebbf47f2c366e2eabff80d87cc07 (patch)
tree1157130bccd541f2ac20036acf7e82372917afa0 /board/pdeval-stm32f072
parent59576398dbc7676fd7a30c2f87700f3c585d6b7e (diff)
downloadchrome-ec-82ec2510a3acebbf47f2c366e2eabff80d87cc07.tar.gz
pd: refactor tcpm and move alert function to tcpm driver
Refactor the tcpm/tcpc split such that the tcpm driver implements the alert functionality since it may be unique for different tcpc chips. BUG=chrome-os-partner:41842 BRANCH=none TEST=make -j buildall. run on samus and glados. Change-Id: I23f2d7f8627d5337b8d001a09bf27622be24fe33 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/281631 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'board/pdeval-stm32f072')
-rw-r--r--board/pdeval-stm32f072/PD_evaluation.md2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/pdeval-stm32f072/PD_evaluation.md b/board/pdeval-stm32f072/PD_evaluation.md
index 6c38ee457a..4eac047ab8 100644
--- a/board/pdeval-stm32f072/PD_evaluation.md
+++ b/board/pdeval-stm32f072/PD_evaluation.md
@@ -37,7 +37,7 @@ You also need to create/delete the corresponding `PD_Cx` tasks in [board/pdeval-
By default, the firmware is using I2C1 with SCL/SDA on pins PB6 and PB7, running with a 100kHz clock.
To change the pins or speed, you need to edit `i2c_ports` in [board/pdeval-stm32f072/board.c](board.c), update `I2C_PORT_TCPC` in [board/pdeval-stm32f072/board.h](board.h) with the right controller number, and change the pin mux in [board/pdeval-stm32f072/gpio.inc](gpio.inc).
-An interrupt line, PA1, is configured to be used for the TCPC to get the attention of the TCPM. The GPIO is configured to trigger an interrupt on the falling edge and will call `tcpc_alert()` which will determine the cause of the interrupt and take action. The GPIO can be changed in [board/pdeval-stm32f072/gpio.inc](gpio.inc).
+An interrupt line, PA1, is configured to be used for the TCPC to get the attention of the TCPM. The GPIO is configured to trigger an interrupt on the falling edge and will call `tcpc_alert()`, which must be implemented in **driver/tcpm/<vendor>.c**, and should determine the cause of the interrupt and take action. The GPIO can be changed in [board/pdeval-stm32f072/gpio.inc](gpio.inc).
Flashing and Running
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