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| author | Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com> | 2018-05-15 15:00:42 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-05-22 15:54:11 -0700 |
| commit | 2c9c55da93f57ac8eaef47328239d8957fd4a5d6 (patch) | |
| tree | 348f0db9253c9e8e5a09e185392f6462e2676a66 /board/phaser/gpio.inc | |
| parent | 32b1e3add72159df481ea5e3d86b581ef07caaa3 (diff) | |
| download | chrome-ec-2c9c55da93f57ac8eaef47328239d8957fd4a5d6.tar.gz | |
octopus: implement device mode
To enable device mode, set the gpio USB2_OTG_ID
in the respective boards to high.
Pull the gpio low to disable device mode.
BUG=b:79343083
BRANCH=NONE
TEST=On Yorp board, for UFP mode gpio USB2_OTG_ID should be high,
for DFP mode gpio USB2_OTG_ID should be low.
In OS console, lspci should list xdci.
(with chromiumos/third_party/coreboot/+/1064592)
Change-Id: I70f13a9705626d9bcbe989239f6826d35d8fa536
Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1058832
Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'board/phaser/gpio.inc')
| -rw-r--r-- | board/phaser/gpio.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/board/phaser/gpio.inc b/board/phaser/gpio.inc index 60b151e2cc..3d4d8a78ec 100644 --- a/board/phaser/gpio.inc +++ b/board/phaser/gpio.inc @@ -109,6 +109,7 @@ GPIO(USB_C1_BC12_VBUS_ON, PIN(B, 1), GPIO_OUT_LOW) /* C1 BC1.2 Power */ GPIO(USB_C1_BC12_CHG_DET_L, PIN(E, 4), GPIO_INPUT) /* C1 BC1.2 Detect */ GPIO(USB_C1_HPD_1V8_ODL, PIN(C, 6), GPIO_INPUT | /* C1 DP Hotplug Detect */ GPIO_SEL_1P8V) +GPIO(USB2_OTG_ID, PIN(8, 3), GPIO_OUT_LOW) /* OTG ID */ /* LED */ GPIO(BAT_LED_ORANGE_L, PIN(C, 3), GPIO_OUT_HIGH) /* LED_1_L */ |