summaryrefslogtreecommitdiff
path: root/board/phaser
diff options
context:
space:
mode:
authorJett Rink <jettrink@chromium.org>2018-06-08 09:28:08 -0600
committerchrome-bot <chrome-bot@chromium.org>2018-06-11 17:29:49 -0700
commit6298200bb724031757c78469d79c2453bef3481e (patch)
tree8b9e1f79dd1120756ee29497dfe144aeea97a073 /board/phaser
parent8babd9c4156d02919f4ff943482997497889c76d (diff)
downloadchrome-ec-6298200bb724031757c78469d79c2453bef3481e.tar.gz
phaser: set 1.8V mode for i2c bus
The alternate mode for i2c still needs to set the 1.8V flag since it is called when configuring the port initially and when it finishes manually unwedging the port. BRANCH=none BUG=b:109884927 TEST=builds Change-Id: Iafa87d3420a3605c0ad87bf8e1f5d69c3edb167a Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1096020 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
Diffstat (limited to 'board/phaser')
-rw-r--r--board/phaser/gpio.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/phaser/gpio.inc b/board/phaser/gpio.inc
index 4d0561d847..b44e15c34e 100644
--- a/board/phaser/gpio.inc
+++ b/board/phaser/gpio.inc
@@ -136,6 +136,6 @@ ALTERNATE(PIN_MASK(9, 0x07), 0, MODULE_I2C, 0) /* I2C1 SCL / I2C2 */
ALTERNATE(PIN_MASK(8, 0x80), 0, MODULE_I2C, 0) /* I2C1 SDA */
ALTERNATE(PIN_MASK(D, 0x03), 0, MODULE_I2C, 0) /* I2C3 */
ALTERNATE(PIN_MASK(F, 0x0C), 0, MODULE_I2C, 0) /* I2C4 */
-ALTERNATE(PIN_MASK(B, 0x0C), 0, MODULE_I2C, 0) /* I2C7 */
+ALTERNATE(PIN_MASK(B, 0x0C), 0, MODULE_I2C, GPIO_SEL_1P8V) /* I2C7 - 1.8V */
ALTERNATE(PIN_MASK(4, 0x30), 0, MODULE_ADC, 0) /* ADC0-1 */
ALTERNATE(PIN_MASK(8, 0x01), 0, MODULE_PWM, 0) /* PWM3: KB_BL_PWM */