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authorRong Chang <rongchang@chromium.org>2015-10-05 15:03:35 +0800
committerchrome-bot <chrome-bot@chromium.org>2015-10-07 05:03:12 -0700
commitf769f9837ccda37eb9b34750bd317148f6d747e3 (patch)
tree42882743e264e21161f9b6cc1c614f61508f5cf5 /board/plankton
parent61361bec9f1e8883123932c2b01b99cd7e754a5f (diff)
downloadchrome-ec-f769f9837ccda37eb9b34750bd317148f6d747e3.tar.gz
plankton: Set case closed debug mux
When enable CCD, we expect DP/USB super speed MUX is switched to USB and reset RFU polarity MUX for USB2 to recognize correct devices. BRANCH=none BUG=chrome-os-partner:44977 TEST=manual Connect plankton's type-c to a PD sink, switch plankton to power source switch DP MUX to DP, and press CCD button. Super speed MUX should be switch to USB3 mode. And if the PD sink supports CCD, host computer should be able to recognize CCD devices. Signed-off-by: Rong Chang <rongchang@chromium.org> Change-Id: I61c80d9a41c368450a9c9f33a20d99eef83a437d Reviewed-on: https://chromium-review.googlesource.com/303285 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org>
Diffstat (limited to 'board/plankton')
-rw-r--r--board/plankton/board.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/board/plankton/board.c b/board/plankton/board.c
index d3a66f1fe2..b833bf6ef1 100644
--- a/board/plankton/board.c
+++ b/board/plankton/board.c
@@ -313,6 +313,13 @@ static void set_usbc_action(enum usbc_action act)
break;
case USBC_ACT_CCD_EN:
pd_send_vdm(0, USB_VID_GOOGLE, VDO_CMD_CCD_EN, NULL, 0);
+ /* Switch to USB mode when enable CCD. */
+ gpio_set_level(GPIO_USBC_SS_USB_MODE, 1);
+ /* Reset RFU polarity MUX */
+ gpio_set_level(GPIO_CASE_CLOSE_EN, 0);
+ gpio_set_level(GPIO_CASE_CLOSE_DFU_L, 0);
+ gpio_set_level(GPIO_CASE_CLOSE_EN, 1);
+ gpio_set_level(GPIO_CASE_CLOSE_DFU_L, 1);
break;
default:
break;