drop unnecessary boards, chips and cts tests

The only board which would be built from this branch is Cr50. bds,
fizz and host boards are necessary for proper make infrastructure
operation and tests.

lm4 and npcx are chips used by the bds and fizz boards, so they are
also kept around.

BRANCH=cr50, cr50-mp
BUG=b:145912698
TEST='make buildall -j' succeeds

Change-Id: I937b2b8642c1fe91578fc9615438ae22c165b20f
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1986942
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Andrey Pronin <apronin@chromium.org>

5 files changed, 0 insertions, 283 deletions

diff --git a/board/polyberry/board.c b/board/polyberry/board.c
deleted file mode 100644
index 5bb811f82c..0000000000
--- a/board/polyberry/board.c
+++ /dev/null
@@ -1,87 +0,0 @@
-/* Copyright 2016 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-/* Polyberry board configuration */
-
-#include "common.h"
-#include "dma.h"
-#include "ec_version.h"
-#include "gpio.h"
-#include "gpio_list.h"
-#include "hooks.h"
-#include "registers.h"
-#include "stm32-dma.h"
-#include "task.h"
-#include "update_fw.h"
-#include "usb_descriptor.h"
-#include "util.h"
-#include "usb_dwc_console.h"
-#include "usb_dwc_update.h"
-#include "usb_hw.h"
-
-/******************************************************************************
- * Define the strings used in our USB descriptors.
- */
-const void *const usb_strings[] = {
-	[USB_STR_DESC]		= usb_string_desc,
-	[USB_STR_VENDOR]	= USB_STRING_DESC("Google Inc."),
-	[USB_STR_PRODUCT]	= USB_STRING_DESC("Polyberry"),
-	[USB_STR_SERIALNO]	= USB_STRING_DESC("1234-a"),
-	[USB_STR_VERSION]	= USB_STRING_DESC(CROS_EC_VERSION32),
-	[USB_STR_CONSOLE_NAME]	= USB_STRING_DESC("Polyberry EC Shell"),
-	[USB_STR_UPDATE_NAME]	= USB_STRING_DESC("Firmware update"),
-};
-
-BUILD_ASSERT(ARRAY_SIZE(usb_strings) == USB_STR_COUNT);
-
-struct dwc_usb usb_ctl = {
-	.ep = {
-		&ep0_ctl,
-		&ep_console_ctl,
-		&usb_update_ep_ctl,
-	},
-	.speed = USB_SPEED_FS,
-	.phy_type = USB_PHY_ULPI,
-	.dma_en = 1,
-	.irq = STM32_IRQ_OTG_HS,
-};
-
-#define GPIO_SET_HS(bank, number)	\
-	(STM32_GPIO_OSPEEDR(GPIO_##bank) |= (0x3 << ((number) * 2)))
-
-void board_config_post_gpio_init(void)
-{
-	/* We use MCO2 clock passthrough to provide a clock to USB HS */
-	gpio_config_module(MODULE_MCO, 1);
-	/* GPIO PC9 to high speed */
-	GPIO_SET_HS(C,  9);
-
-	if (usb_ctl.phy_type == USB_PHY_ULPI)
-		gpio_set_level(GPIO_USB_MUX_SEL, 0);
-	else
-		gpio_set_level(GPIO_USB_MUX_SEL, 1);
-
-	/* Set USB GPIO to high speed */
-	GPIO_SET_HS(A, 11);
-	GPIO_SET_HS(A, 12);
-
-	GPIO_SET_HS(C,  3);
-	GPIO_SET_HS(C,  2);
-	GPIO_SET_HS(C,  0);
-	GPIO_SET_HS(A,  5);
-
-	GPIO_SET_HS(B,  5);
-	GPIO_SET_HS(B, 13);
-	GPIO_SET_HS(B, 12);
-	GPIO_SET_HS(B,  2);
-	GPIO_SET_HS(B, 10);
-	GPIO_SET_HS(B,  1);
-	GPIO_SET_HS(B,  0);
-	GPIO_SET_HS(A,  3);
-}
-
-static void board_init(void)
-{
-}
-DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
diff --git a/board/polyberry/board.h b/board/polyberry/board.h
deleted file mode 100644
index 8e55967bf5..0000000000
--- a/board/polyberry/board.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/* Copyright 2016 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Polyberry configuration */
-
-#ifndef __CROS_EC_BOARD_H
-#define __CROS_EC_BOARD_H
-
-#define CONFIG_FLASH_WRITE_SIZE STM32_FLASH_WRITE_SIZE_3300
-
-/* Use external clock */
-#define CONFIG_STM32_CLOCK_HSE_HZ 24000000
-
-#define CONFIG_BOARD_POST_GPIO_INIT
-
-/* Enable console recasting of GPIO type. */
-#define CONFIG_CMD_GPIO_EXTENDED
-
-/* The UART console is on test points USART3 (PC10/PC11) */
-#undef CONFIG_UART_CONSOLE
-#define CONFIG_UART_CONSOLE 3
-#undef CONFIG_UART_TX_BUF_SIZE
-#define CONFIG_UART_TX_BUF_SIZE 4096
-/* Don't waste precious DMA channels on console. */
-#undef CONFIG_UART_TX_DMA
-#undef CONFIG_UART_RX_DMA
-
-#define CONFIG_UART_TX_REQ_CH 4
-#define CONFIG_UART_RX_REQ_CH 4
-
-/* USB Configuration */
-#define CONFIG_USB
-#define CONFIG_USB_PID 0x5020
-#define CONFIG_USB_CONSOLE
-#define CONFIG_STREAM_USB
-#define CONFIG_USB_UPDATE
-
-#undef CONFIG_USB_MAXPOWER_MA
-#define CONFIG_USB_MAXPOWER_MA 100
-
-#define CONFIG_USB_SERIALNO
-#define DEFAULT_SERIALNO "Uninitialized"
-
-/* USB interface indexes (use define rather than enum to expand them) */
-#define USB_IFACE_CONSOLE	0
-#define USB_IFACE_UPDATE	1
-#define USB_IFACE_COUNT		2
-
-/* USB endpoint indexes (use define rather than enum to expand them) */
-#define USB_EP_CONTROL		0
-#define USB_EP_CONSOLE		1
-#define USB_EP_UPDATE		2
-#define USB_EP_COUNT		3
-
-/* This is not actually a Chromium EC so disable some features. */
-#undef CONFIG_WATCHDOG_HELP
-#undef CONFIG_LID_SWITCH
-#undef CONFIG_WATCHDOG
-
-/* Optional features */
-#define CONFIG_STM_HWTIMER32
-
-/*
- * Allow dangerous commands all the time, since we don't have a write protect
- * switch.
- */
-#define CONFIG_SYSTEM_UNLOCKED
-
-#ifndef __ASSEMBLER__
-
-/* Timer selection */
-#define TIM_CLOCK32 5
-
-#include "gpio_signal.h"
-
-/* USB string indexes */
-enum usb_strings {
-	USB_STR_DESC = 0,
-	USB_STR_VENDOR,
-	USB_STR_PRODUCT,
-	USB_STR_SERIALNO,
-	USB_STR_VERSION,
-	USB_STR_CONSOLE_NAME,
-	USB_STR_UPDATE_NAME,
-	USB_STR_COUNT
-};
-
-#endif /* !__ASSEMBLER__ */
-#endif /* __CROS_EC_BOARD_H */
diff --git a/board/polyberry/build.mk b/board/polyberry/build.mk
deleted file mode 100644
index 6b06f2bb8f..0000000000
--- a/board/polyberry/build.mk
+++ /dev/null
@@ -1,12 +0,0 @@
-# -*- makefile -*-
-# Copyright 2016 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-#
-# Board specific files build
-
-CHIP:=stm32
-CHIP_FAMILY:=stm32f4
-CHIP_VARIANT:=stm32f446
-
-board-y=board.o
diff --git a/board/polyberry/ec.tasklist b/board/polyberry/ec.tasklist
deleted file mode 100644
index c1fb169118..0000000000
--- a/board/polyberry/ec.tasklist
+++ /dev/null
@@ -1,11 +0,0 @@
-/* Copyright 2016 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/**
- * See CONFIG_TASK_LIST in config.h for details.
- */
-#define CONFIG_TASK_LIST \
-	TASK_ALWAYS(HOOKS,   hook_task,    NULL, VENTI_TASK_STACK_SIZE) \
-	TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE)
diff --git a/board/polyberry/gpio.inc b/board/polyberry/gpio.inc
deleted file mode 100644
index 536dccc5ff..0000000000
--- a/board/polyberry/gpio.inc
+++ /dev/null
@@ -1,82 +0,0 @@
-/* -*- mode:c -*-
- *
- * Copyright 2016 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Declare symbolic names for all the GPIOs that we care about.
- * Note: Those with interrupt handlers must be declared first. */
-
-/* Outputs */
-GPIO(PM_RESET_L,		PIN(D, 0),  GPIO_OUT_HIGH)
-GPIO(PM_KPD_PWR_L,		PIN(D, 1),  GPIO_OUT_HIGH)
-GPIO(AP_RESET_L,		PIN(D, 2),  GPIO_OUT_HIGH)
-GPIO(AP_FORCED_USB_BOOT,	PIN(D, 3),  GPIO_OUT_LOW)
-GPIO(AP_PS_HOLD,		PIN(D, 4),  GPIO_OUT_HIGH)
-
-GPIO(MUX_EN_L,			PIN(A, 7),  GPIO_INPUT)
-GPIO(USB_MUX_SEL,		PIN(A, 6),  GPIO_OUT_HIGH)
-GPIO(PHY_RESET,			PIN(C, 4),  GPIO_INPUT)
-GPIO(LED_BLUE,			PIN(A, 2),  GPIO_ODR_LOW)
-GPIO(LED_GRN,			PIN(B, 8),  GPIO_ODR_LOW)
-GPIO(LED_RED,			PIN(B, 15), GPIO_ODR_LOW)
-
-/* Clock function */
-GPIO(MCU_TO_PHY_MCO,		PIN(C, 9), GPIO_INPUT)
-
-
-/* These pin assignments aren't used as GPIO. Let's note them here
- * for readability but not initialize them.
- * USART1 TX/RX - AP
- * GPIO(MCU_UART1_TX,		PIN(A, 9), GPIO_INPUT)
- * GPIO(MCU_UART1_RX,		PIN(A, 10), GPIO_INPUT)
- * USART2 TX/RX - Sensor Hub
- * GPIO(MCU_UART2_TX,		PIN(D, 5), GPIO_INPUT)
- * GPIO(MCU_UART2_RX,		PIN(D, 6), GPIO_INPUT)
-
- * USART3 TX/RX - Console
- * GPIO(MCU_UART3_TX,		PIN(C, 10), GPIO_INPUT)
- * GPIO(MCU_UART3_RX,		PIN(C, 11), GPIO_INPUT)
- * USART5 TX/RX - SSC (?)
- * GPIO(MCU_UART5_TX,		PIN(E, 7), GPIO_INPUT)
- * GPIO(MCU_UART5_RX,		PIN(E, 8), GPIO_INPUT)
- */
-
-/* USB pins */
-GPIO(USB_FS_DM,			PIN(A, 11), GPIO_INPUT)
-GPIO(USB_FS_DP,			PIN(A, 12), GPIO_INPUT)
-
-GPIO(USB_HS_ULPI_NXT,		PIN(C, 3), GPIO_INPUT)
-GPIO(USB_HS_ULPI_DIR,		PIN(C, 2), GPIO_INPUT)
-GPIO(USB_HS_ULPI_STP,		PIN(C, 0), GPIO_INPUT)
-GPIO(USB_HS_ULPI_CK,		PIN(A, 5), GPIO_INPUT)
-
-GPIO(USB_HS_ULPI_D7,		PIN(B, 5), GPIO_INPUT)
-GPIO(USB_HS_ULPI_D6,		PIN(B,13), GPIO_INPUT)
-GPIO(USB_HS_ULPI_D5,		PIN(B,12), GPIO_INPUT)
-GPIO(USB_HS_ULPI_D4,		PIN(B, 2), GPIO_INPUT)
-GPIO(USB_HS_ULPI_D3,		PIN(B,10), GPIO_INPUT)
-GPIO(USB_HS_ULPI_D2,		PIN(B, 1), GPIO_INPUT)
-GPIO(USB_HS_ULPI_D1,		PIN(B, 0), GPIO_INPUT)
-GPIO(USB_HS_ULPI_D0,		PIN(A, 3), GPIO_INPUT)
-
-
-/* Unimplemented signals since we are not an EC */
-UNIMPLEMENTED(ENTERING_RW)
-UNIMPLEMENTED(WP_L)
-
-
-ALTERNATE(PIN_MASK(A, 0x0600), 7, MODULE_UART, 0) /* USART1: PA9/PA10 - AP */
-ALTERNATE(PIN_MASK(D, 0x0060), 7, MODULE_UART, 0) /* USART2: PD5/PD6 - SH */
-ALTERNATE(PIN_MASK(C, 0x0c00), 7, MODULE_UART, 0) /* USART3: PC10/PC11 - Console */
-ALTERNATE(PIN_MASK(D, 0x00c0), 8, MODULE_UART, 0) /* USART5: PE7/PE8 - SSC */
-
-/* OTG FS */
-ALTERNATE(PIN_MASK(A, 0x1800), 10, MODULE_USB, 0) /* DWC USB OTG: PA11/12 */
-
-/* OTG HS */
-ALTERNATE(PIN_MASK(A, 0x0028), 10, MODULE_USB, 0) /* DWC USB OTG HS */
-ALTERNATE(PIN_MASK(B, 0x3427), 10, MODULE_USB, 0) /* DWC USB OTG HS */
-ALTERNATE(PIN_MASK(C, 0x000d), 10, MODULE_USB, 0) /* DWC USB OTG HS */
-ALTERNATE(PIN_MASK(C, 0x0200), 0, MODULE_MCO, 0) /* MCO2: PC9 */