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authorNicolas Boichat <drinkcat@chromium.org>2020-05-25 13:53:35 +0800
committerCommit Bot <commit-bot@chromium.org>2020-12-21 04:45:49 +0000
commit89dbca62cb6b01f1242b01a44a8ac41c1cd6d151 (patch)
tree5b8c412f92533a581ec16059131108b062fc3aad /board/poppy/board.c
parent23f7201a183a51843176df8b8d9309fc34cdefbd (diff)
downloadchrome-ec-89dbca62cb6b01f1242b01a44a8ac41c1cd6d151.tar.gz
poppy: Disable PU on GPIO10
For NPCX5, when CR_SIN is selected via DEVALTC.UART_SL2, the PU/PD is selected according to GPIO10 configuration (and not according to GPIO64). Also, disable the relevant WKIEN bit for GPIO10. BRANCH=poppy BUG=b:111215677 TEST=Boot soraka Change-Id: Icee01043dcd562f9b72f2097b9a988d5535e0ffc Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2214454 (cherry picked from commit e03bbafca5d83361f32233a6bfd09c65702102b6) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2342953 Reviewed-by: Namyoon Woo <namyoon@chromium.org>
Diffstat (limited to 'board/poppy/board.c')
-rw-r--r--board/poppy/board.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/board/poppy/board.c b/board/poppy/board.c
index 6dfb9ab441..84caa7a497 100644
--- a/board/poppy/board.c
+++ b/board/poppy/board.c
@@ -579,6 +579,16 @@ static void board_init(void)
}
#endif
+#ifndef BOARD_LUX
+ /*
+ * see (b/111215677): setting the internal PU/PD of the unused pin
+ * GPIO10 affects the ball K10 when it is selected to CR_SIN.
+ * Disabing the WKINEN bit of GPIO10 insteading setting its PU/PD to
+ * bypass this issue.
+ */
+ NPCX_WKINEN(MIWU_TABLE_1, MIWU_GROUP_2) &= 0xFE;
+#endif
+
/* Enable Gyro interrupts */
gpio_enable_interrupt(GPIO_ACCELGYRO3_INT_L);