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| author | Furquan Shaikh <furquan@chromium.org> | 2017-11-22 16:43:19 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-11-22 22:54:46 -0800 |
| commit | 349c1bd11d1372f7ae70e09c6271bc5ae21276e9 (patch) | |
| tree | 4cdfc7e4f27c22cf6d978b531231367f4f31cbf2 /board/poppy/board.c | |
| parent | e6694c5c8eae6fa72289d6cdc3328e438863b791 (diff) | |
| download | chrome-ec-349c1bd11d1372f7ae70e09c6271bc5ae21276e9.tar.gz | |
poppy/soraka/nautilus: Do not enable V5A in deep sleep state
V5A was enabled in deep sleep state to allow wake from base in deep S3
state. Now that poppy and variants don't plan to use deep S3, this
change is no longer required.
BUG=b:69053636
BRANCH=None
TEST=Verified following:
> ectool i2cxfer 3 0x30 1 0x41
Read bytes: 00
> ectool i2cxfer 3 0x30 1 0x2a
Read bytes: 00
Change-Id: Ice8cabf5ecac3851400af5fef43821f596bc5224
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/786789
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Diffstat (limited to 'board/poppy/board.c')
| -rw-r--r-- | board/poppy/board.c | 19 |
1 files changed, 0 insertions, 19 deletions
diff --git a/board/poppy/board.c b/board/poppy/board.c index a270e985e7..6d87057ee2 100644 --- a/board/poppy/board.c +++ b/board/poppy/board.c @@ -1032,31 +1032,12 @@ DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT); static void board_chipset_startup(void) { - /* - * Enable V5A in deep sleep state: - * VREN (bit 0) : EC_DS4 enable - * - Enables V5A voltage regulator in deep Sx states - * V5ADS3CNT (bits 1:0) : AUTO - * - Control to the VR (0 = off, 1 = PFM, 2 = AUTO, 3 = Forced PWM) - */ - i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x41, 0x01); - i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x2a, 0x02); - base_enable(); } DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_chipset_startup, HOOK_PRIO_DEFAULT); static void board_chipset_shutdown(void) { - /* - * V5A VREN needs to be reset when chipset is shutdown. This is required - * because VREN keeps the V5A powered in all deep Sx states including - * deep S5. There is no need to power this rail in deep S5 as wake from - * base is not required. - */ - i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x41, 0x0); - i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x2a, 0x0); - base_disable(); } DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_chipset_shutdown, HOOK_PRIO_DEFAULT); |