diff options
| author | ayowu <ayowu@google.com> | 2017-11-23 12:29:00 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-12-14 23:57:29 -0800 |
| commit | 7610082ddc18640b1f7fd810fdf442592acb2e46 (patch) | |
| tree | c3956d6f9123021edf277a0339535d329063b612 /board/poppy/gpio.inc | |
| parent | ae00aa80225ed725d2962dfb608019d3fb70b314 (diff) | |
| download | chrome-ec-7610082ddc18640b1f7fd810fdf442592acb2e46.tar.gz | |
ec: Re-configure GPIO02 to be INPUT | PULL_UP for power saving
GPIO02 (EC_HAVEN_RESET_ODL) is now configured to GPIO_ODR_HIGH,
designed for EC to reset H1. And it's no longer used with just
the HW path reserved (DNS R267 on schematic).
Tests showed that INPUT | PULL_UP has lower EC power consumption
so reconfiguring here.
BUG=b:64503543
BRANCH=none
TEST=manual
(on chroot)
$ make BOARD=soraka -j
$ ./util/flash_ec --board soraka
(on DUT)
$ powerd_dbus_suspend
(on chroot)
$ dut-control -p $PORT pp3300_dsw_ec_ma -t 10 | grep @@
> @@ NAME COUNT AVERAGE STDDEV MAX MIN
> @@ pp3300_dsw_ec_ma 5629 1.25 0.71 16.60 1.12
Without the change, the original setting gives:
> @@ NAME COUNT AVERAGE STDDEV MAX MIN
> @@ pp3300_dsw_ec_ma 4674 2.69 1.98 12.00 2.00
Change-Id: I4e2268612109155f57fdd236088cadaaba54bb3f
Signed-off-by: Ayo Wu <ayowu@google.com>
Reviewed-on: https://chromium-review.googlesource.com/786951
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Diffstat (limited to 'board/poppy/gpio.inc')
| -rw-r--r-- | board/poppy/gpio.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/poppy/gpio.inc b/board/poppy/gpio.inc index bda0029f8d..337e41ed78 100644 --- a/board/poppy/gpio.inc +++ b/board/poppy/gpio.inc @@ -51,7 +51,7 @@ GPIO(SYS_RESET_L, PIN(6, 1), GPIO_ODR_HIGH) /* Cold Reset to SOC */ GPIO(PMIC_SLP_SUS_L, PIN(8, 5), GPIO_OUT_LOW) /* SLP_SUS# to PMIC */ GPIO(BATTERY_PRESENT_L, PIN(3, 4), GPIO_INPUT) /* Battery Present */ GPIO(CCD_MODE_ODL, PIN(6, 3), GPIO_INPUT) /* Case Closed Debug Mode */ -GPIO(EC_HAVEN_RESET_ODL, PIN(0, 2), GPIO_ODR_HIGH) /* H1 Reset */ +GPIO(EC_HAVEN_RESET_ODL, PIN(0, 2), GPIO_INPUT | GPIO_PULL_UP) /* H1 Reset (unused) */ GPIO(ENTERING_RW, PIN(7, 6), GPIO_OUTPUT) /* EC Entering RW */ GPIO(PMIC_INT_L, PIN(6, 0), GPIO_INPUT | GPIO_PULL_UP) /* PMIC interrupt */ #ifndef CONFIG_POWER_S0IX |